MALI: rockchip: upgrade DDK to r8p0-02rel0.

[firefly-linux-kernel-4.4.55.git] / drivers / gpu / arm / midgard / backend / gpu / mali_kbase_pm_backend.c

diff --git a/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_backend.c b/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_backend.c
index 9ff7baadec7a32cf6ce69612a38a62e8241c9046..57ef9843657ee2bd3a2eecd952c947a1bc30ed30 100644 (file)
--- a/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_backend.c
+++ b/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_backend.c
@@ -35,9 +35,6 @@ void kbase_pm_register_access_enable(struct kbase_device *kbdev)
 {
        struct kbase_pm_callback_conf *callbacks;
 
-#ifdef CONFIG_MALI_PLATFORM_DEVICETREE
-       pm_runtime_enable(kbdev->dev);
-#endif /* CONFIG_MALI_PLATFORM_DEVICETREE */
        callbacks = (struct kbase_pm_callback_conf *)POWER_MANAGEMENT_CALLBACKS;
 
        if (callbacks)
@@ -56,9 +53,6 @@ void kbase_pm_register_access_disable(struct kbase_device *kbdev)
                callbacks->power_off_callback(kbdev);
 
        kbdev->pm.backend.gpu_powered = false;
-#ifdef CONFIG_MALI_PLATFORM_DEVICETREE
-       pm_runtime_disable(kbdev->dev);
-#endif
 }
 
 int kbase_hwaccess_pm_init(struct kbase_device *kbdev)
@@ -96,6 +90,8 @@ int kbase_hwaccess_pm_init(struct kbase_device *kbdev)
                                        callbacks->power_runtime_on_callback;
                kbdev->pm.backend.callback_power_runtime_off =
                                        callbacks->power_runtime_off_callback;
+               kbdev->pm.backend.callback_power_runtime_idle =
+                                       callbacks->power_runtime_idle_callback;
        } else {
                kbdev->pm.backend.callback_power_on = NULL;
                kbdev->pm.backend.callback_power_off = NULL;
@@ -105,6 +101,7 @@ int kbase_hwaccess_pm_init(struct kbase_device *kbdev)
                kbdev->pm.callback_power_runtime_term = NULL;
                kbdev->pm.backend.callback_power_runtime_on = NULL;
                kbdev->pm.backend.callback_power_runtime_off = NULL;
+               kbdev->pm.backend.callback_power_runtime_idle = NULL;
        }
 
        /* Initialise the metrics subsystem */
@@ -227,7 +224,9 @@ int kbase_hwaccess_pm_powerup(struct kbase_device *kbdev,
 
        kbasep_pm_read_present_cores(kbdev);
 
-       kbdev->pm.debug_core_mask =
+       kbdev->pm.debug_core_mask_all = kbdev->pm.debug_core_mask[0] =
+                       kbdev->pm.debug_core_mask[1] =
+                       kbdev->pm.debug_core_mask[2] =
                        kbdev->gpu_props.props.raw_props.shader_present;
 
        /* Pretend the GPU is active to prevent a power policy turning the GPU
@@ -321,9 +320,15 @@ void kbase_pm_power_changed(struct kbase_device *kbdev)
        }
 }
 
-void kbase_pm_set_debug_core_mask(struct kbase_device *kbdev, u64 new_core_mask)
+void kbase_pm_set_debug_core_mask(struct kbase_device *kbdev,
+               u64 new_core_mask_js0, u64 new_core_mask_js1,
+               u64 new_core_mask_js2)
 {
-       kbdev->pm.debug_core_mask = new_core_mask;
+       kbdev->pm.debug_core_mask[0] = new_core_mask_js0;
+       kbdev->pm.debug_core_mask[1] = new_core_mask_js1;
+       kbdev->pm.debug_core_mask[2] = new_core_mask_js2;
+       kbdev->pm.debug_core_mask_all = new_core_mask_js0 | new_core_mask_js1 |
+                       new_core_mask_js2;
 
        kbase_pm_update_cores_state_nolock(kbdev);
 }