gpio: omap: simplify omap_set_gpio_dataout_x()

[firefly-linux-kernel-4.4.55.git] / drivers / gpio / gpio-omap.c

diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index f476ae2eb0b3c8610e54377cf7e3010079e916bf..7aeee7b1d4059b0abfd47655fa97a64c05ff462a 100644 (file)
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -75,7 +75,7 @@ struct gpio_bank {
        int power_mode;
        bool workaround_enabled;
 
-       void (*set_dataout)(struct gpio_bank *bank, int gpio, int enable);
+       void (*set_dataout)(struct gpio_bank *bank, unsigned gpio, int enable);
        int (*get_context_loss_count)(struct device *dev);
 
        struct omap_gpio_reg_offs *regs;
@@ -119,11 +119,11 @@ static void omap_set_gpio_direction(struct gpio_bank *bank, int gpio,
 
 
 /* set data out value using dedicate set/clear register */
-static void omap_set_gpio_dataout_reg(struct gpio_bank *bank, int gpio,
+static void omap_set_gpio_dataout_reg(struct gpio_bank *bank, unsigned offset,
                                      int enable)
 {
        void __iomem *reg = bank->base;
-       u32 l = GPIO_BIT(bank, gpio);
+       u32 l = BIT(offset);
 
        if (enable) {
                reg += bank->regs->set_dataout;
@@ -137,11 +137,11 @@ static void omap_set_gpio_dataout_reg(struct gpio_bank *bank, int gpio,
 }
 
 /* set data out value using mask register */
-static void omap_set_gpio_dataout_mask(struct gpio_bank *bank, int gpio,
+static void omap_set_gpio_dataout_mask(struct gpio_bank *bank, unsigned offset,
                                       int enable)
 {
        void __iomem *reg = bank->base + bank->regs->dataout;
-       u32 gpio_bit = GPIO_BIT(bank, gpio);
+       u32 gpio_bit = BIT(offset);
        u32 l;
 
        l = readl_relaxed(reg);
@@ -472,11 +472,11 @@ static void omap_disable_gpio_module(struct gpio_bank *bank, unsigned offset)
        }
 }
 
-static int omap_gpio_is_input(struct gpio_bank *bank, int mask)
+static int omap_gpio_is_input(struct gpio_bank *bank, unsigned offset)
 {
        void __iomem *reg = bank->base + bank->regs->direction;
 
-       return readl_relaxed(reg) & mask;
+       return readl_relaxed(reg) & BIT(offset);
 }
 
 static void omap_gpio_init_irq(struct gpio_bank *bank, unsigned gpio,
@@ -519,7 +519,7 @@ static int omap_gpio_irq_type(struct irq_data *d, unsigned type)
        offset = GPIO_INDEX(bank, gpio);
        retval = omap_set_gpio_triggering(bank, offset, type);
        omap_gpio_init_irq(bank, gpio, offset);
-       if (!omap_gpio_is_input(bank, BIT(offset))) {
+       if (!omap_gpio_is_input(bank, offset)) {
                spin_unlock_irqrestore(&bank->lock, flags);
                return -EINVAL;
        }
@@ -826,7 +826,6 @@ static void omap_gpio_irq_shutdown(struct irq_data *d)
        unsigned offset = GPIO_INDEX(bank, gpio);
 
        spin_lock_irqsave(&bank->lock, flags);
-       gpiochip_unlock_as_irq(&bank->chip, offset);
        bank->irq_usage &= ~(BIT(offset));
        omap_disable_gpio_module(bank, offset);
        omap_reset_gpio(bank, gpio);
@@ -977,12 +976,10 @@ static int omap_gpio_input(struct gpio_chip *chip, unsigned offset)
 static int omap_gpio_get(struct gpio_chip *chip, unsigned offset)
 {
        struct gpio_bank *bank;
-       u32 mask;
 
        bank = container_of(chip, struct gpio_bank, chip);
-       mask = (BIT(offset));
 
-       if (omap_gpio_is_input(bank, mask))
+       if (omap_gpio_is_input(bank, offset))
                return omap_get_gpio_datain(bank, offset);
        else
                return omap_get_gpio_dataout(bank, offset);