Merge branch 'v4.4/topic/ro-vdso' into linux-linaro-lsk-v4.4

[firefly-linux-kernel-4.4.55.git] / drivers / dma / xgene-dma.c

diff --git a/drivers/dma/xgene-dma.c b/drivers/dma/xgene-dma.c
index 8d57b1b12e411ef902d26af984e7d34a741a4cf2..9cb93c5b655d80f411079aff95e02f612b7f3ec0 100644 (file)
--- a/drivers/dma/xgene-dma.c
+++ b/drivers/dma/xgene-dma.c
@@ -29,6 +29,7 @@
 #include <linux/dmapool.h>
 #include <linux/interrupt.h>
 #include <linux/io.h>
+#include <linux/irq.h>
 #include <linux/module.h>
 #include <linux/of_device.h>
 
@@ -547,14 +548,12 @@ static struct xgene_dma_desc_sw *xgene_dma_alloc_descriptor(
        struct xgene_dma_desc_sw *desc;
        dma_addr_t phys;
 
-       desc = dma_pool_alloc(chan->desc_pool, GFP_NOWAIT, &phys);
+       desc = dma_pool_zalloc(chan->desc_pool, GFP_NOWAIT, &phys);
        if (!desc) {
                chan_err(chan, "Failed to allocate LDs\n");
                return NULL;
        }
 
-       memset(desc, 0, sizeof(*desc));
-
        INIT_LIST_HEAD(&desc->tx_list);
        desc->tx.phys = phys;
        desc->tx.tx_submit = xgene_dma_tx_submit;
@@ -894,60 +893,6 @@ static void xgene_dma_free_chan_resources(struct dma_chan *dchan)
        chan->desc_pool = NULL;
 }
 
-static struct dma_async_tx_descriptor *xgene_dma_prep_memcpy(
-       struct dma_chan *dchan, dma_addr_t dst, dma_addr_t src,
-       size_t len, unsigned long flags)
-{
-       struct xgene_dma_desc_sw *first = NULL, *new;
-       struct xgene_dma_chan *chan;
-       size_t copy;
-
-       if (unlikely(!dchan || !len))
-               return NULL;
-
-       chan = to_dma_chan(dchan);
-
-       do {
-               /* Allocate the link descriptor from DMA pool */
-               new = xgene_dma_alloc_descriptor(chan);
-               if (!new)
-                       goto fail;
-
-               /* Create the largest transaction possible */
-               copy = min_t(size_t, len, XGENE_DMA_MAX_64B_DESC_BYTE_CNT);
-
-               /* Prepare DMA descriptor */
-               xgene_dma_prep_cpy_desc(chan, new, dst, src, copy);
-
-               if (!first)
-                       first = new;
-
-               new->tx.cookie = 0;
-               async_tx_ack(&new->tx);
-
-               /* Update metadata */
-               len -= copy;
-               dst += copy;
-               src += copy;
-
-               /* Insert the link descriptor to the LD ring */
-               list_add_tail(&new->node, &first->tx_list);
-       } while (len);
-
-       new->tx.flags = flags; /* client is in control of this ack */
-       new->tx.cookie = -EBUSY;
-       list_splice(&first->tx_list, &new->tx_list);
-
-       return &new->tx;
-
-fail:
-       if (!first)
-               return NULL;
-
-       xgene_dma_free_desc_list(chan, &first->tx_list);
-       return NULL;
-}
-
 static struct dma_async_tx_descriptor *xgene_dma_prep_sg(
        struct dma_chan *dchan, struct scatterlist *dst_sg,
        u32 dst_nents, struct scatterlist *src_sg,
@@ -1666,6 +1611,7 @@ static int xgene_dma_request_irqs(struct xgene_dma *pdma)
        /* Register DMA channel rx irq */
        for (i = 0; i < XGENE_DMA_MAX_CHANNEL; i++) {
                chan = &pdma->chan[i];
+               irq_set_status_flags(chan->rx_irq, IRQ_DISABLE_UNLAZY);
                ret = devm_request_irq(chan->dev, chan->rx_irq,
                                       xgene_dma_chan_ring_isr,
                                       0, chan->name, chan);
@@ -1676,6 +1622,7 @@ static int xgene_dma_request_irqs(struct xgene_dma *pdma)
 
                        for (j = 0; j < i; j++) {
                                chan = &pdma->chan[i];
+                               irq_clear_status_flags(chan->rx_irq, IRQ_DISABLE_UNLAZY);
                                devm_free_irq(chan->dev, chan->rx_irq, chan);
                        }
 
@@ -1696,6 +1643,7 @@ static void xgene_dma_free_irqs(struct xgene_dma *pdma)
 
        for (i = 0; i < XGENE_DMA_MAX_CHANNEL; i++) {
                chan = &pdma->chan[i];
+               irq_clear_status_flags(chan->rx_irq, IRQ_DISABLE_UNLAZY);
                devm_free_irq(chan->dev, chan->rx_irq, chan);
        }
 }
@@ -1707,7 +1655,6 @@ static void xgene_dma_set_caps(struct xgene_dma_chan *chan,
        dma_cap_zero(dma_dev->cap_mask);
 
        /* Set DMA device capability */
-       dma_cap_set(DMA_MEMCPY, dma_dev->cap_mask);
        dma_cap_set(DMA_SG, dma_dev->cap_mask);
 
        /* Basically here, the X-Gene SoC DMA engine channel 0 supports XOR
@@ -1734,7 +1681,6 @@ static void xgene_dma_set_caps(struct xgene_dma_chan *chan,
        dma_dev->device_free_chan_resources = xgene_dma_free_chan_resources;
        dma_dev->device_issue_pending = xgene_dma_issue_pending;
        dma_dev->device_tx_status = xgene_dma_tx_status;
-       dma_dev->device_prep_dma_memcpy = xgene_dma_prep_memcpy;
        dma_dev->device_prep_dma_sg = xgene_dma_prep_sg;
 
        if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
@@ -1787,8 +1733,7 @@ static int xgene_dma_async_register(struct xgene_dma *pdma, int id)
 
        /* DMA capability info */
        dev_info(pdma->dev,
-                "%s: CAPABILITY ( %s%s%s%s)\n", dma_chan_name(&chan->dma_chan),
-                dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask) ? "MEMCPY " : "",
+                "%s: CAPABILITY ( %s%s%s)\n", dma_chan_name(&chan->dma_chan),
                 dma_has_cap(DMA_SG, dma_dev->cap_mask) ? "SGCPY " : "",
                 dma_has_cap(DMA_XOR, dma_dev->cap_mask) ? "XOR " : "",
                 dma_has_cap(DMA_PQ, dma_dev->cap_mask) ? "PQ " : "");