Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/signal

[firefly-linux-kernel-4.4.55.git] / drivers / clocksource / exynos_mct.c

diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c
index b078d7cbc93089f08860e4fac3ea2cc7facabd29..662fcc065821f3100e55e014b2ce1801966e87e8 100644 (file)
--- a/drivers/clocksource/exynos_mct.c
+++ b/drivers/clocksource/exynos_mct.c
@@ -25,11 +25,6 @@
 #include <linux/clocksource.h>
 
 #include <asm/localtimer.h>
-
-#include <plat/cpu.h>
-
-#include <mach/map.h>
-#include <mach/irqs.h>
 #include <asm/mach/time.h>
 
 #define EXYNOS4_MCTREG(x)              (x)
@@ -476,12 +471,20 @@ static struct local_timer_ops exynos4_mct_tick_ops __cpuinitdata = {
 };
 #endif /* CONFIG_LOCAL_TIMERS */
 
-static void __init exynos4_timer_resources(void __iomem *base)
+static void __init exynos4_timer_resources(struct device_node *np, void __iomem *base)
 {
-       struct clk *mct_clk;
-       mct_clk = clk_get(NULL, "xtal");
+       struct clk *mct_clk, *tick_clk;
+
+       tick_clk = np ? of_clk_get_by_name(np, "fin_pll") :
+                               clk_get(NULL, "fin_pll");
+       if (IS_ERR(tick_clk))
+               panic("%s: unable to determine tick clock rate\n", __func__);
+       clk_rate = clk_get_rate(tick_clk);
 
-       clk_rate = clk_get_rate(mct_clk);
+       mct_clk = np ? of_clk_get_by_name(np, "mct") : clk_get(NULL, "mct");
+       if (IS_ERR(mct_clk))
+               panic("%s: unable to retrieve mct clock instance\n", __func__);
+       clk_prepare_enable(mct_clk);
 
        reg_base = base;
        if (!reg_base)
@@ -502,18 +505,14 @@ static void __init exynos4_timer_resources(void __iomem *base)
 #endif /* CONFIG_LOCAL_TIMERS */
 }
 
-void __init mct_init(void)
+void __init mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1)
 {
-       if (soc_is_exynos4210()) {
-               mct_irqs[MCT_G0_IRQ] = EXYNOS4_IRQ_MCT_G0;
-               mct_irqs[MCT_L0_IRQ] = EXYNOS4_IRQ_MCT_L0;
-               mct_irqs[MCT_L1_IRQ] = EXYNOS4_IRQ_MCT_L1;
-               mct_int_type = MCT_INT_SPI;
-       } else {
-               panic("unable to determine mct controller type\n");
-       }
+       mct_irqs[MCT_G0_IRQ] = irq_g0;
+       mct_irqs[MCT_L0_IRQ] = irq_l0;
+       mct_irqs[MCT_L1_IRQ] = irq_l1;
+       mct_int_type = MCT_INT_SPI;
 
-       exynos4_timer_resources(S5P_VA_SYSTIMER);
+       exynos4_timer_resources(NULL, base);
        exynos4_clocksource_init();
        exynos4_clockevent_init();
 }
@@ -532,11 +531,15 @@ static void __init mct_init_dt(struct device_node *np, unsigned int int_type)
         * timer irqs are specified after the four global timer
         * irqs are specified.
         */
+#ifdef CONFIG_OF
        nr_irqs = of_irq_count(np);
+#else
+       nr_irqs = 0;
+#endif
        for (i = MCT_L0_IRQ; i < nr_irqs; i++)
                mct_irqs[i] = irq_of_parse_and_map(np, i);
 
-       exynos4_timer_resources(of_iomap(np, 0));
+       exynos4_timer_resources(np, of_iomap(np, 0));
        exynos4_clocksource_init();
        exynos4_clockevent_init();
 }