Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/signal

[firefly-linux-kernel-4.4.55.git] / drivers / clocksource / exynos_mct.c

diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c
index 203ac05e2b3d9b4631dd5050f2cebfaf0d705d48..662fcc065821f3100e55e014b2ce1801966e87e8 100644 (file)
--- a/drivers/clocksource/exynos_mct.c
+++ b/drivers/clocksource/exynos_mct.c
@@ -24,13 +24,7 @@
 #include <linux/of_address.h>
 #include <linux/clocksource.h>
 
-#include <asm/arch_timer.h>
 #include <asm/localtimer.h>
-
-#include <plat/cpu.h>
-
-#include <mach/map.h>
-#include <mach/irqs.h>
 #include <asm/mach/time.h>
 
 #define EXYNOS4_MCTREG(x)              (x)
@@ -477,7 +471,7 @@ static struct local_timer_ops exynos4_mct_tick_ops __cpuinitdata = {
 };
 #endif /* CONFIG_LOCAL_TIMERS */
 
-static void __init exynos4_timer_resources(struct device_node *np)
+static void __init exynos4_timer_resources(struct device_node *np, void __iomem *base)
 {
        struct clk *mct_clk, *tick_clk;
 
@@ -492,7 +486,7 @@ static void __init exynos4_timer_resources(struct device_node *np)
                panic("%s: unable to retrieve mct clock instance\n", __func__);
        clk_prepare_enable(mct_clk);
 
-       reg_base = np ? of_iomap(np, 0) : S5P_VA_SYSTIMER;
+       reg_base = base;
        if (!reg_base)
                panic("%s: unable to ioremap mct address space\n", __func__);
 
@@ -511,48 +505,54 @@ static void __init exynos4_timer_resources(struct device_node *np)
 #endif /* CONFIG_LOCAL_TIMERS */
 }
 
-static const struct of_device_id exynos_mct_ids[] = {
-       { .compatible = "samsung,exynos4210-mct", .data = (void *)MCT_INT_SPI },
-       { .compatible = "samsung,exynos4412-mct", .data = (void *)MCT_INT_PPI },
-};
+void __init mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1)
+{
+       mct_irqs[MCT_G0_IRQ] = irq_g0;
+       mct_irqs[MCT_L0_IRQ] = irq_l0;
+       mct_irqs[MCT_L1_IRQ] = irq_l1;
+       mct_int_type = MCT_INT_SPI;
 
-void __init mct_init(void)
+       exynos4_timer_resources(NULL, base);
+       exynos4_clocksource_init();
+       exynos4_clockevent_init();
+}
+
+static void __init mct_init_dt(struct device_node *np, unsigned int int_type)
 {
-       struct device_node *np = NULL;
-       const struct of_device_id *match;
        u32 nr_irqs, i;
 
-#ifdef CONFIG_OF
-       np = of_find_matching_node_and_match(NULL, exynos_mct_ids, &match);
-#endif
-       if (np) {
-               mct_int_type = (u32)(match->data);
+       mct_int_type = int_type;
 
-               /* This driver uses only one global timer interrupt */
-               mct_irqs[MCT_G0_IRQ] = irq_of_parse_and_map(np, MCT_G0_IRQ);
+       /* This driver uses only one global timer interrupt */
+       mct_irqs[MCT_G0_IRQ] = irq_of_parse_and_map(np, MCT_G0_IRQ);
 
-               /*
-                * Find out the number of local irqs specified. The local
-                * timer irqs are specified after the four global timer
-                * irqs are specified.
-                */
+       /*
+        * Find out the number of local irqs specified. The local
+        * timer irqs are specified after the four global timer
+        * irqs are specified.
+        */
 #ifdef CONFIG_OF
-               nr_irqs = of_irq_count(np);
+       nr_irqs = of_irq_count(np);
+#else
+       nr_irqs = 0;
 #endif
-               for (i = MCT_L0_IRQ; i < nr_irqs; i++)
-                       mct_irqs[i] = irq_of_parse_and_map(np, i);
-       } else if (soc_is_exynos4210()) {
-               mct_irqs[MCT_G0_IRQ] = EXYNOS4_IRQ_MCT_G0;
-               mct_irqs[MCT_L0_IRQ] = EXYNOS4_IRQ_MCT_L0;
-               mct_irqs[MCT_L1_IRQ] = EXYNOS4_IRQ_MCT_L1;
-               mct_int_type = MCT_INT_SPI;
-       } else {
-               panic("unable to determine mct controller type\n");
-       }
+       for (i = MCT_L0_IRQ; i < nr_irqs; i++)
+               mct_irqs[i] = irq_of_parse_and_map(np, i);
 
-       exynos4_timer_resources(np);
+       exynos4_timer_resources(np, of_iomap(np, 0));
        exynos4_clocksource_init();
        exynos4_clockevent_init();
 }
-CLOCKSOURCE_OF_DECLARE(exynos4210, "samsung,exynos4210-mct", mct_init)
-CLOCKSOURCE_OF_DECLARE(exynos4412, "samsung,exynos4412-mct", mct_init)
+
+
+static void __init mct_init_spi(struct device_node *np)
+{
+       return mct_init_dt(np, MCT_INT_SPI);
+}
+
+static void __init mct_init_ppi(struct device_node *np)
+{
+       return mct_init_dt(np, MCT_INT_PPI);
+}
+CLOCKSOURCE_OF_DECLARE(exynos4210, "samsung,exynos4210-mct", mct_init_spi);
+CLOCKSOURCE_OF_DECLARE(exynos4412, "samsung,exynos4412-mct", mct_init_ppi);