CLK: SPEAr: Update clock rate table

[firefly-linux-kernel-4.4.55.git] / drivers / clk / spear / spear3xx_clock.c

diff --git a/drivers/clk/spear/spear3xx_clock.c b/drivers/clk/spear/spear3xx_clock.c
index ff35ebca1d8d648219e2b1fd8a119f4f226fbfb6..a07c067fe96084c51b74b34c0fd6fbb4fb9cd9fe 100644 (file)
--- a/drivers/clk/spear/spear3xx_clock.c
+++ b/drivers/clk/spear/spear3xx_clock.c
@@ -107,6 +107,12 @@ static struct pll_rate_tbl pll_rtbl[] = {
 /* aux rate configuration table, in ascending order of rates */
 static struct aux_rate_tbl aux_rtbl[] = {
        /* For PLL1 = 332 MHz */
+       {.xscale = 1, .yscale = 81, .eq = 0}, /* 2.049 MHz */
+       {.xscale = 1, .yscale = 59, .eq = 0}, /* 2.822 MHz */
+       {.xscale = 2, .yscale = 81, .eq = 0}, /* 4.098 MHz */
+       {.xscale = 3, .yscale = 89, .eq = 0}, /* 5.644 MHz */
+       {.xscale = 4, .yscale = 81, .eq = 0}, /* 8.197 MHz */
+       {.xscale = 4, .yscale = 59, .eq = 0}, /* 11.254 MHz */
        {.xscale = 2, .yscale = 27, .eq = 0}, /* 12.296 MHz */
        {.xscale = 2, .yscale = 8, .eq = 0}, /* 41.5 MHz */
        {.xscale = 2, .yscale = 4, .eq = 0}, /* 83 MHz */