Merge tag 'pm+acpi-3.20-rc1-3' of git://git.kernel.org/pub/scm/linux/kernel/git/rafae...

[firefly-linux-kernel-4.4.55.git] / drivers / clk / samsung / clk-exynos5420.c

diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c
index 848d602efc065d1bfda47c0b89e2c8c660da83f3..07d666cc6a29b9f3567deec197756b5927f68ac7 100644 (file)
--- a/drivers/clk/samsung/clk-exynos5420.c
+++ b/drivers/clk/samsung/clk-exynos5420.c
@@ -635,8 +635,8 @@ static struct samsung_mux_clock exynos5x_mux_clks[] __initdata = {
                        SRC_TOP3, 0, 1),
        MUX(0, "mout_user_aclk400_mscl", mout_user_aclk400_mscl_p,
                        SRC_TOP3, 4, 1),
-       MUX(0, "mout_user_aclk200_disp1", mout_user_aclk200_disp1_p,
-                       SRC_TOP3, 8, 1),
+       MUX(CLK_MOUT_USER_ACLK200_DISP1, "mout_user_aclk200_disp1",
+                       mout_user_aclk200_disp1_p, SRC_TOP3, 8, 1),
        MUX(0, "mout_user_aclk200_fsys2", mout_user_aclk200_fsys2_p,
                        SRC_TOP3, 12, 1),
        MUX(0, "mout_user_aclk400_wcore", mout_user_aclk400_wcore_p,
@@ -663,8 +663,8 @@ static struct samsung_mux_clock exynos5x_mux_clks[] __initdata = {
        MUX(CLK_MOUT_USER_ACLK333, "mout_user_aclk333", mout_user_aclk333_p,
                        SRC_TOP4, 28, 1),
 
-       MUX(0, "mout_user_aclk400_disp1", mout_user_aclk400_disp1_p,
-                       SRC_TOP5, 0, 1),
+       MUX(CLK_MOUT_USER_ACLK400_DISP1, "mout_user_aclk400_disp1",
+                       mout_user_aclk400_disp1_p, SRC_TOP5, 0, 1),
        MUX(0, "mout_user_aclk66_psgen", mout_user_aclk66_peric_p,
                        SRC_TOP5, 4, 1),
        MUX(0, "mout_user_aclk333_g2d", mout_user_aclk333_g2d_p,
@@ -675,8 +675,8 @@ static struct samsung_mux_clock exynos5x_mux_clks[] __initdata = {
                        SRC_TOP5, 16, 1),
        MUX(0, "mout_user_aclk300_jpeg", mout_user_aclk300_jpeg_p,
                        SRC_TOP5, 20, 1),
-       MUX(0, "mout_user_aclk300_disp1", mout_user_aclk300_disp1_p,
-                       SRC_TOP5, 24, 1),
+       MUX(CLK_MOUT_USER_ACLK300_DISP1, "mout_user_aclk300_disp1",
+                       mout_user_aclk300_disp1_p, SRC_TOP5, 24, 1),
        MUX(0, "mout_user_aclk300_gscl", mout_user_aclk300_gscl_p,
                        SRC_TOP5, 28, 1),
 
@@ -693,7 +693,8 @@ static struct samsung_mux_clock exynos5x_mux_clks[] __initdata = {
                        SRC_TOP10, 0, 1),
        MUX(0, "mout_sw_aclk400_mscl", mout_sw_aclk400_mscl_p,
                        SRC_TOP10, 4, 1),
-       MUX(0, "mout_sw_aclk200", mout_sw_aclk200_p, SRC_TOP10, 8, 1),
+       MUX(CLK_MOUT_SW_ACLK200, "mout_sw_aclk200", mout_sw_aclk200_p,
+                       SRC_TOP10, 8, 1),
        MUX(0, "mout_sw_aclk200_fsys2", mout_sw_aclk200_fsys2_p,
                        SRC_TOP10, 12, 1),
        MUX(0, "mout_sw_aclk400_wcore", mout_sw_aclk400_wcore_p,
@@ -717,8 +718,8 @@ static struct samsung_mux_clock exynos5x_mux_clks[] __initdata = {
        MUX(CLK_MOUT_SW_ACLK333, "mout_sw_aclk333", mout_sw_aclk333_p,
                        SRC_TOP11, 28, 1),
 
-       MUX(0, "mout_sw_aclk400_disp1", mout_sw_aclk400_disp1_p,
-                       SRC_TOP12, 4, 1),
+       MUX(CLK_MOUT_SW_ACLK400, "mout_sw_aclk400_disp1",
+                       mout_sw_aclk400_disp1_p, SRC_TOP12, 4, 1),
        MUX(0, "mout_sw_aclk333_g2d", mout_sw_aclk333_g2d_p,
                        SRC_TOP12, 8, 1),
        MUX(0, "mout_sw_aclk266_g2d", mout_sw_aclk266_g2d_p,
@@ -726,8 +727,8 @@ static struct samsung_mux_clock exynos5x_mux_clks[] __initdata = {
        MUX(0, "mout_sw_aclk_g3d", mout_sw_aclk_g3d_p, SRC_TOP12, 16, 1),
        MUX(0, "mout_sw_aclk300_jpeg", mout_sw_aclk300_jpeg_p,
                        SRC_TOP12, 20, 1),
-       MUX(0, "mout_sw_aclk300_disp1", mout_sw_aclk300_disp1_p,
-                       SRC_TOP12, 24, 1),
+       MUX(CLK_MOUT_SW_ACLK300, "mout_sw_aclk300_disp1",
+                       mout_sw_aclk300_disp1_p, SRC_TOP12, 24, 1),
        MUX(0, "mout_sw_aclk300_gscl", mout_sw_aclk300_gscl_p,
                        SRC_TOP12, 28, 1),