UPSTREAM: clk: rockchip: allow varying mux parameters for cpuclk pll-sources

[firefly-linux-kernel-4.4.55.git] / drivers / clk / rockchip / clk-rk3368.c

diff --git a/drivers/clk/rockchip/clk-rk3368.c b/drivers/clk/rockchip/clk-rk3368.c
index 74c4ea65d3fe153c6dc8c2328e82b90d6c989c6e..b5c2c363da72db88fa9064a1c3e0da6d296e7a82 100644 (file)
--- a/drivers/clk/rockchip/clk-rk3368.c
+++ b/drivers/clk/rockchip/clk-rk3368.c
@@ -166,14 +166,20 @@ static const struct rockchip_cpuclk_reg_data rk3368_cpuclkb_data = {
        .core_reg = RK3368_CLKSEL_CON(0),
        .div_core_shift = 0,
        .div_core_mask = 0x1f,
+       .mux_core_alt = 1,
+       .mux_core_main = 0,
        .mux_core_shift = 7,
+       .mux_core_mask = 0x1,
 };
 
 static const struct rockchip_cpuclk_reg_data rk3368_cpuclkl_data = {
        .core_reg = RK3368_CLKSEL_CON(2),
        .div_core_shift = 0,
+       .mux_core_alt = 1,
+       .mux_core_main = 0,
        .div_core_mask = 0x1f,
        .mux_core_shift = 7,
+       .mux_core_mask = 0x1,
 };
 
 #define RK3368_DIV_ACLKM_MASK          0x1f