Merge branch develop-3.10-next

[firefly-linux-kernel-4.4.55.git] / drivers / clk / rockchip / clk-ops.c

diff --git a/drivers/clk/rockchip/clk-ops.c b/drivers/clk/rockchip/clk-ops.c
index f2cb1c6572160f45fbc9348a41b8d5665a2f9784..98957d323b5499217552cb37521d7b0fa5399651 100644 (file)
--- a/drivers/clk/rockchip/clk-ops.c
+++ b/drivers/clk/rockchip/clk-ops.c
@@ -7,6 +7,7 @@
 #include <linux/clk-private.h>
 #include <linux/delay.h>
 #include <linux/rockchip/common.h>
+#include <linux/rockchip/cpu.h>
 
 #include "clk-ops.h"
 
@@ -633,6 +634,7 @@ static int clk_3288_dclk_lcdc0_set_rate(struct clk_hw *hw, unsigned long rate,
 {
        struct clk* aclk_vio0 = clk_get(NULL, "aclk_vio0");
        struct clk* hclk_vio = clk_get(NULL, "hclk_vio");
+       struct clk *aclk_vio1;
        struct clk* parent;
 
        clk_divider_ops.set_rate(hw, rate, parent_rate);
@@ -647,6 +649,13 @@ static int clk_3288_dclk_lcdc0_set_rate(struct clk_hw *hw, unsigned long rate,
        clk_set_rate(aclk_vio0, __clk_get_rate(parent));
        clk_set_rate(hclk_vio, 100*MHZ);
 
+       /* make aclk_isp and hclk_isp share a same pll in rk3288_eco */
+       if (rockchip_get_cpu_version() > 0) {
+               aclk_vio1 = clk_get(NULL, "aclk_vio1");
+               clk_set_parent(aclk_vio1, parent);
+               clk_set_rate(aclk_vio1, __clk_get_rate(parent));
+       }
+
        return 0;
 }
 
@@ -703,8 +712,10 @@ static int clk_3288_dclk_lcdc1_set_rate(struct clk_hw *hw, unsigned long rate,
        else
                parent = clk_get(NULL, "clk_cpll");
 
-       clk_set_parent(aclk_vio1, parent);
-       clk_set_rate(aclk_vio1, __clk_get_rate(parent));
+       if (rockchip_get_cpu_version() == 0) {
+               clk_set_parent(aclk_vio1, parent);
+               clk_set_rate(aclk_vio1, __clk_get_rate(parent));
+       }
 
        return 0;
 }