clk: hi6220: Clock driver support for Hisilicon hi6220 SoC

[firefly-linux-kernel-4.4.55.git] / drivers / clk / hisilicon / clk.h

diff --git a/drivers/clk/hisilicon/clk.h b/drivers/clk/hisilicon/clk.h
index 6b6f99448e015c258d985f96dbd6b6c6feb54f94..21b403b3423a11593b5b695aa4a9579c92e241c4 100644 (file)
--- a/drivers/clk/hisilicon/clk.h
+++ b/drivers/clk/hisilicon/clk.h
@@ -79,6 +79,18 @@ struct hisi_divider_clock {
        const char              *alias;
 };
 
+struct hi6220_divider_clock {
+       unsigned int            id;
+       const char              *name;
+       const char              *parent_name;
+       unsigned long           flags;
+       unsigned long           offset;
+       u8                      shift;
+       u8                      width;
+       u32                     mask_bit;
+       const char              *alias;
+};
+
 struct hisi_gate_clock {
        unsigned int            id;
        const char              *name;
@@ -94,6 +106,9 @@ struct clk *hisi_register_clkgate_sep(struct device *, const char *,
                                const char *, unsigned long,
                                void __iomem *, u8,
                                u8, spinlock_t *);
+struct clk *hi6220_register_clkdiv(struct device *dev, const char *name,
+       const char *parent_name, unsigned long flags, void __iomem *reg,
+       u8 shift, u8 width, u32 mask_bit, spinlock_t *lock);
 
 struct hisi_clock_data *hisi_clk_init(struct device_node *, int);
 void hisi_clk_register_fixed_rate(struct hisi_fixed_rate_clock *,
@@ -108,4 +123,6 @@ void hisi_clk_register_gate(struct hisi_gate_clock *,
                                int, struct hisi_clock_data *);
 void hisi_clk_register_gate_sep(struct hisi_gate_clock *,
                                int, struct hisi_clock_data *);
+void hi6220_clk_register_divider(struct hi6220_divider_clock *,
+                               int, struct hisi_clock_data *);
 #endif /* __HISI_CLK_H */