revert android-tegra-2.6.36-honeycomb-mr1-9001adc to v2.6.36

[firefly-linux-kernel-4.4.55.git] / drivers / char / agp / intel-gtt.c

diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index 6ea3bf6e5b1a588db479dc6cbb4cfbbec0850df1..75e0a3497888d295d25dd414bda8a2ce69eee724 100644 (file)
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -534,7 +534,7 @@ static void intel_i830_init_gtt_entries(void)
 
        pci_read_config_word(agp_bridge->dev, I830_GMCH_CTRL, &gmch_ctrl);
 
-       if (IS_G33 || IS_I965) {
+       if (IS_I965) {
                u32 pgetbl_ctl;
                pgetbl_ctl = readl(intel_private.registers+I810_PGETBL_CTL);
 
@@ -567,6 +567,22 @@ static void intel_i830_init_gtt_entries(void)
                        size = 512;
                }
                size += 4; /* add in BIOS popup space */
+       } else if (IS_G33 && !IS_PINEVIEW) {
+       /* G33's GTT size defined in gmch_ctrl */
+               switch (gmch_ctrl & G33_PGETBL_SIZE_MASK) {
+               case G33_PGETBL_SIZE_1M:
+                       size = 1024;
+                       break;
+               case G33_PGETBL_SIZE_2M:
+                       size = 2048;
+                       break;
+               default:
+                       dev_info(&agp_bridge->dev->dev,
+                                "unknown page table size 0x%x, assuming 512KB\n",
+                               (gmch_ctrl & G33_PGETBL_SIZE_MASK));
+                       size = 512;
+               }
+               size += 4;
        } else if (IS_G4X || IS_PINEVIEW) {
                /* On 4 series hardware, GTT stolen is separate from graphics
                 * stolen, ignore it in stolen gtt entries counting.  However,
@@ -1241,31 +1257,24 @@ static int intel_i915_get_gtt_size(void)
        int size;
 
        if (IS_G33) {
-               u32 pgetbl_ctl;
-               pgetbl_ctl = readl(intel_private.registers+I810_PGETBL_CTL);
+               u16 gmch_ctrl;
 
-               switch (pgetbl_ctl & I965_PGETBL_SIZE_MASK) {
-               case I965_PGETBL_SIZE_128KB:
-                       size = 128;
-                       break;
-               case I965_PGETBL_SIZE_256KB:
-                       size = 256;
-                       break;
-               case I965_PGETBL_SIZE_512KB:
+               /* G33's GTT size defined in gmch_ctrl */
+               pci_read_config_word(agp_bridge->dev, I830_GMCH_CTRL, &gmch_ctrl);
+               switch (gmch_ctrl & I830_GMCH_GMS_MASK) {
+               case I830_GMCH_GMS_STOLEN_512:
                        size = 512;
                        break;
-               case I965_PGETBL_SIZE_1MB:
+               case I830_GMCH_GMS_STOLEN_1024:
                        size = 1024;
                        break;
-               case I965_PGETBL_SIZE_2MB:
-                       size = 2048;
-                       break;
-               case I965_PGETBL_SIZE_1_5MB:
-                       size = 1024 + 512;
+               case I830_GMCH_GMS_STOLEN_8192:
+                       size = 8*1024;
                        break;
                default:
-                       dev_info(&intel_private.pcidev->dev,
-                                "unknown page table size, assuming 512KB\n");
+                       dev_info(&agp_bridge->dev->dev,
+                                "unknown page table size 0x%x, assuming 512KB\n",
+                               (gmch_ctrl & I830_GMCH_GMS_MASK));
                        size = 512;
                }
        } else {
@@ -1297,14 +1306,6 @@ static int intel_i915_create_gatt_table(struct agp_bridge_data *bridge)
        pci_read_config_dword(intel_private.pcidev, I915_MMADDR, &temp);
        pci_read_config_dword(intel_private.pcidev, I915_PTEADDR, &temp2);
 
-       temp &= 0xfff80000;
-
-       intel_private.registers = ioremap(temp, 128 * 4096);
-       if (!intel_private.registers) {
-               iounmap(intel_private.gtt);
-               return -ENOMEM;
-       }
-
        gtt_map_size = intel_i915_get_gtt_size();
 
        intel_private.gtt = ioremap(temp2, gtt_map_size);
@@ -1313,6 +1314,14 @@ static int intel_i915_create_gatt_table(struct agp_bridge_data *bridge)
 
        intel_private.gtt_total_size = gtt_map_size / 4;
 
+       temp &= 0xfff80000;
+
+       intel_private.registers = ioremap(temp, 128 * 4096);
+       if (!intel_private.registers) {
+               iounmap(intel_private.gtt);
+               return -ENOMEM;
+       }
+
        temp = readl(intel_private.registers+I810_PGETBL_CTL) & 0xfffff000;
        global_cache_flush();   /* FIXME: ? */