ARM64: sched: fix bug: remove printk while schedule is in progress

[firefly-linux-kernel-4.4.55.git] / drivers / ata / sata_mv.c

diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index f8c33e3772b823e123f4b32c2c066608297e06c2..bd74ee555278513118d057e832b3ec599923bb69 100644 (file)
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -306,6 +306,11 @@ enum {
        MV5_PHY_CTL             = 0x0C,
        SATA_IFCFG              = 0x050,
        LP_PHY_CTL              = 0x058,
+       LP_PHY_CTL_PIN_PU_PLL   = (1 << 0),
+       LP_PHY_CTL_PIN_PU_RX    = (1 << 1),
+       LP_PHY_CTL_PIN_PU_TX    = (1 << 2),
+       LP_PHY_CTL_GEN_TX_3G    = (1 << 5),
+       LP_PHY_CTL_GEN_RX_3G    = (1 << 9),
 
        MV_M2_PREAMP_MASK       = 0x7e0,
 
@@ -1391,10 +1396,17 @@ static int mv_scr_write(struct ata_link *link, unsigned int sc_reg_in, u32 val)
                                /*
                                 * Set PHY speed according to SControl speed.
                                 */
-                               if ((val & 0xf0) == 0x10)
-                                       writelfl(0x7, lp_phy_addr);
-                               else
-                                       writelfl(0x227, lp_phy_addr);
+                               u32 lp_phy_val =
+                                       LP_PHY_CTL_PIN_PU_PLL |
+                                       LP_PHY_CTL_PIN_PU_RX  |
+                                       LP_PHY_CTL_PIN_PU_TX;
+
+                               if ((val & 0xf0) != 0x10)
+                                       lp_phy_val |=
+                                               LP_PHY_CTL_GEN_TX_3G |
+                                               LP_PHY_CTL_GEN_RX_3G;
+
+                               writelfl(lp_phy_val, lp_phy_addr);
                        }
                }
                writelfl(val, addr);
@@ -4308,10 +4320,10 @@ static int pci_go_64(struct pci_dev *pdev)
 {
        int rc;
 
-       if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
-               rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
+       if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) {
+               rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
                if (rc) {
-                       rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
+                       rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
                        if (rc) {
                                dev_err(&pdev->dev,
                                        "64-bit DMA enable failed\n");
@@ -4319,12 +4331,12 @@ static int pci_go_64(struct pci_dev *pdev)
                        }
                }
        } else {
-               rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
+               rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
                if (rc) {
                        dev_err(&pdev->dev, "32-bit DMA enable failed\n");
                        return rc;
                }
-               rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
+               rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
                if (rc) {
                        dev_err(&pdev->dev,
                                "32-bit consistent DMA enable failed\n");