in the 3.9 release. Please migrate to using CMake. For more information see:
`Building LLVM with CMake <CMake.html>`_
-* The C API function LLVMLinkModules is deprecated. It will be removed in the
- 3.9 release. Please migrate to LLVMLinkModules2. Unlike the old function the
+* We have documented our C API stability guarantees for both development and
+ release branches, as well as documented how to extend the C API. Please see
+ the `developer documentation <DeveloperPolicy.html#c-api-changes>`_ for more
+ information.
+
+* The C API function ``LLVMLinkModules`` is deprecated. It will be removed in the
+ 3.9 release. Please migrate to ``LLVMLinkModules2``. Unlike the old function the
new one
* Doesn't take an unused parameter.
* Destroys the source instead of only damaging it.
* Does not record a message. Use the diagnostic handler instead.
-* The C API functions LLVMParseBitcode, LLVMParseBitcodeInContext,
- LLVMGetBitcodeModuleInContext and LLVMGetBitcodeModule have been deprecated.
+* The C API functions ``LLVMParseBitcode``, ``LLVMParseBitcodeInContext``,
+ ``LLVMGetBitcodeModuleInContext`` and ``LLVMGetBitcodeModule`` have been deprecated.
They will be removed in 3.9. Please migrate to the versions with a 2 suffix.
Unlike the old ones the new ones do not record a diagnostic message. Use
the diagnostic handler instead.
-* The deprecated C APIs LLVMGetBitcodeModuleProviderInContext and
- LLVMGetBitcodeModuleProvider have been removed.
+* The deprecated C APIs ``LLVMGetBitcodeModuleProviderInContext`` and
+ ``LLVMGetBitcodeModuleProvider`` have been removed.
-* The deprecated C APIs LLVMCreateExecutionEngine, LLVMCreateInterpreter,
- LLVMCreateJITCompiler, LLVMAddModuleProvider and LLVMRemoveModuleProvider
+* The deprecated C APIs ``LLVMCreateExecutionEngine``, ``LLVMCreateInterpreter``,
+ ``LLVMCreateJITCompiler``, ``LLVMAddModuleProvider`` and ``LLVMRemoveModuleProvider``
have been removed.
* With this release, the C API headers have been reorganized to improve build
Core.h so nothing should change for projects directly including the headers,
but transitive dependencies may be affected.
-* llvm-ar now suports thin archives.
+* llvm-ar now supports thin archives.
-* llvm doesn't produce .data.rel.ro.local or .data.rel sections anymore.
+* llvm doesn't produce ``.data.rel.ro.local`` or ``.data.rel`` sections anymore.
-* aliases to available_externally globals are now rejected by the verifier.
+* Aliases to ``available_externally`` globals are now rejected by the verifier.
-* the IR Linker has been split into IRMover that moves bits from one module to
+* The IR Linker has been split into ``IRMover`` that moves bits from one module to
another and Linker proper that decides what to link.
* Support for dematerializing has been dropped.
-* RegisterScheduler::setDefault was removed. Targets that used to call into the
- command line parser to set the DAGScheduler, and that don't have enough
- control with setSchedulingPreference, should look into overriding the
- SubTargetHook "getDAGScheduler()".
+* ``RegisterScheduler::setDefault`` was removed. Targets that used to call into the
+ command line parser to set the ``DAGScheduler``, and that don't have enough
+ control with ``setSchedulingPreference``, should look into overriding the
+ ``SubTargetHook`` "``getDAGScheduler()``".
* ``ilist_iterator<T>`` no longer has implicit conversions to and from ``T*``,
since ``ilist_iterator<T>`` may be pointing at the sentinel (which is usually
* ``ilist_node<T>::getNextNode()`` and ``ilist_node<T>::getPrevNode()`` now
fail at compile time when the node cannot access its parent list.
Previously, when the sentinel was was an ``ilist_half_node<T>``, this API
- could return the sentinal instead of ``nullptr``. Frustrated callers should
+ could return the sentinel instead of ``nullptr``. Frustrated callers should
be updated to use ``iplist<T>::getNextNode(T*)`` instead. Alternatively, if
the node ``N`` is guaranteed not to be the last in the list, it is safe to
call ``&*++N->getIterator()`` directly.
-.. NOTE
- For small 1-3 sentence descriptions, just add an entry at the end of
- this list. If your description won't fit comfortably in one bullet
- point (e.g. maybe you would like to give an example of the
- functionality, or simply have a lot to talk about), see the `NOTE` below
- for adding a new subsection.
+* The `Kaleidoscope tutorials <tutorial/index.html>`_ have been updated to use
+ the ORC JIT APIs.
-* ... next change ...
+* ORC now has a basic set of C bindings.
-.. NOTE
- If you would like to document a larger change, then you can add a
- subsection about it right here. You can copy the following boilerplate
- and un-indent it (the indentation causes it to be inside this comment).
+* Optional support for linking clang and the LLVM tools with a single libLLVM
+ shared library. To enable this, pass ``-DLLVM_LINK_LLVM_DYLIB=ON`` to CMake.
+ See `Building LLVM with CMake`_ for more details.
- Special New Feature
- -------------------
+* The optimization to move the prologue and epilogue of functions in colder
+ code path (shrink-wrapping) is now enabled by default.
- Makes programs 10x faster by doing Special New Thing.
+* A new target-independent gcc-compatible emulated Thread Local Storage mode
+ is added. When ``-femultated-tls`` flag is used, all accesses to TLS
+ variables are converted to calls to ``__emutls_get_address`` in the runtime
+ library.
-Changes to the X86 and X86-64 Targets
--------------------------------------
+* MSVC-compatible exception handling has been completely overhauled. New
+ instructions have been introduced to facilitate this:
+ `New exception handling instructions <ExceptionHandling.html#new-exception-handling-instructions>`_.
+ While we have done our best to test this feature thoroughly, it would
+ not be completely surprising if there were a few lingering issues that
+ early adopters might bump into.
-* Smaller code for materializing 32-bit 1 and -1 constants at ``-Os``.
-* More efficient code for wide integer compares. (E.g. 64-bit compares
- on 32-bit targets.)
+Changes to the ARM Backends
+---------------------------
-* Tail call support for ``thiscall``, ``stdcall`, ``vectorcall``, and
- ``fastcall`` functions.
+During this release the AArch64 target has:
+* Added support for more sanitizers (MSAN, TSAN) and made them compatible with
+ all VMA kernel configurations (currently tested on 39 and 42 bits).
+* Gained initial LLD support in the new ELF back-end
+* Extended the Load/Store optimiser and cleaned up some of the bad decisions
+ made earlier.
+* Expanded LLDB support, including watchpoints, native building, Renderscript,
+ LLDB-server, debugging 32-bit applications.
+* Added support for the ``Exynos M1`` chip.
-Changes to the ARM Backend
---------------------------
+During this release the ARM target has:
- During this release ...
+* Gained massive performance improvements on embedded benchmarks due to finally
+ running the stride vectorizer in full form, incrementing the performance gains
+ that we already had in the previous releases with limited stride vectorization.
+* Expanded LLDB support, including watchpoints, unwind tables
+* Extended the Load/Store optimiser and cleaned up some of the bad decisions
+ made earlier.
+* Simplified code generation for global variable addresses in ELF, resulting in
+ a significant (4% in Chromium) reduction in code size.
+* Gained some additional code size improvements, though there's still a long road
+ ahead, especially for older cores.
+* Added some EABI floating point comparison functions to Compiler-RT
+* Added support for Windows+GNU triple, ``+features`` in ``-mcpu``/``-march`` options.
Changes to the MIPS Target
* Added support for the ``ERETNC`` instruction found in MIPS32R5 and later.
* Added support for OpenCL. See http://portablecl.org/.
- * Address spaces 1 to 255 are now reserved for software use and conversions
- between them are no-op casts.
+* Address spaces 1 to 255 are now reserved for software use and conversions
+ between them are no-op casts.
-* Removed the ``mips16`` value for the -mcpu option since it is an :abbr:`ASE
+* Removed the ``mips16`` value for the ``-mcpu`` option since it is an :abbr:`ASE
(Application Specific Extension)` and not a processor. If you were using this,
please specify another CPU and use ``-mips16`` to enable MIPS16.
* Removed ``copy_u.w`` from 32-bit MSA and ``copy_u.d`` from 64-bit MSA since
* Added support for atomic load and atomic store.
* Corrected debug info when dynamically re-aligning the stack.
-Integrated Assembler
-^^^^^^^^^^^^^^^^^^^^
We have made a large number of improvements to the integrated assembler for
MIPS. In this release, the integrated assembler isn't quite production-ready
since there are a few known issues related to bare-metal support, checking
Changes to the PowerPC Target
-----------------------------
- During this release ...
+There are numerous improvements to the PowerPC target in this release:
+
+* Shrink wrapping optimization has been enabled for PowerPC Little Endian
+
+* Direct move instructions are used when converting scalars to vectors
+
+* Thread Sanitizer (TSAN) is now supported for PowerPC
+
+* New MI peephole pass to clean up redundant XXPERMDI instructions
+
+* Add branch hints to highly biased branch instructions (code reaching
+ unreachable terminators and exceptional control flow constructs)
+
+* Promote boolean return values to integer to prevent excessive usage of
+ condition registers
+
+* Additional vector APIs for vector comparisons and vector merges have been
+ added to altivec.h
+
+* Many bugs have been identified and fixed
Changes to the X86 Target
-----------------------------
- During this release ...
-
* TLS is enabled for Cygwin as emutls.
+* Smaller code for materializing 32-bit 1 and -1 constants at ``-Os``.
-Changes to the OCaml bindings
+* More efficient code for wide integer compares. (E.g. 64-bit compares
+ on 32-bit targets.)
+
+* Tail call support for ``thiscall``, ``stdcall``, ``vectorcall``, and
+ ``fastcall`` functions.
+
+Changes to the Hexagon Target
-----------------------------
- During this release ...
+In addition to general code size and performance improvements, Hexagon target
+now has basic support for Hexagon V60 architecture and Hexagon Vector
+Extensions (HVX).
+
+Changes to the AVR Target
+-------------------------
+
+Slightly less than half of the AVR backend has been merged in at this point. It is still
+missing a number large parts which cause it to be unusable, but is well on the
+road to being completely merged and workable.
+
+Changes to the OCaml bindings
+-----------------------------
* The ocaml function link_modules has been replaced with link_modules' which
uses LLVMLinkModules2.
If you have any questions or comments about LLVM, please feel free to contact
us via the `mailing lists <http://llvm.org/docs/#maillist>`_.
-