clk: exynos4: Remove E4X12 prefix from SRC_DMC register

[firefly-linux-kernel-4.4.55.git] / crypto / Kconfig

diff --git a/crypto/Kconfig b/crypto/Kconfig
index 3f37520035ddcc9c71e9ee11c6c2666e84ac6c4a..05c0ce52f96d94ef1a69b839d7aa28e5202bc566 100644 (file)
--- a/crypto/Kconfig
+++ b/crypto/Kconfig
@@ -353,6 +353,27 @@ config CRYPTO_CRC32C_SPARC64
          CRC32c CRC algorithm implemented using sparc64 crypto instructions,
          when available.
 
+config CRYPTO_CRC32
+       tristate "CRC32 CRC algorithm"
+       select CRYPTO_HASH
+       select CRC32
+       help
+         CRC-32-IEEE 802.3 cyclic redundancy-check algorithm.
+         Shash crypto api wrappers to crc32_le function.
+
+config CRYPTO_CRC32_PCLMUL
+       tristate "CRC32 PCLMULQDQ hardware acceleration"
+       depends on X86
+       select CRYPTO_HASH
+       select CRC32
+       help
+         From Intel Westmere and AMD Bulldozer processor with SSE4.2
+         and PCLMULQDQ supported, the processor will support
+         CRC32 PCLMULQDQ implementation using hardware accelerated PCLMULQDQ
+         instruction. This option will create 'crc32-plcmul' module,
+         which will enable any routine to use the CRC-32-IEEE 802.3 checksum
+         and gain better performance as compared with the table implementation.
+
 config CRYPTO_GHASH
        tristate "GHASH digest algorithm"
        select CRYPTO_GF128MUL
@@ -477,6 +498,13 @@ config CRYPTO_SHA1_ARM
          SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented
          using optimized ARM assembler.
 
+config CRYPTO_SHA1_PPC
+       tristate "SHA1 digest algorithm (powerpc)"
+       depends on PPC
+       help
+         This is the powerpc hardware accelerated implementation of the
+         SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
+
 config CRYPTO_SHA256
        tristate "SHA224 and SHA256 digest algorithm"
        select CRYPTO_HASH