tile: parameterize VA and PA space more cleanly

[firefly-linux-kernel-4.4.55.git] / arch / tile / include / asm / pgtable_32.h

diff --git a/arch/tile/include/asm/pgtable_32.h b/arch/tile/include/asm/pgtable_32.h
index 4ce4a7a99c244c5546f37465f6ebceafbb55173e..63142ab3b3dd8337bf1b6cc2c165af65fc85181a 100644 (file)
--- a/arch/tile/include/asm/pgtable_32.h
+++ b/arch/tile/include/asm/pgtable_32.h
@@ -84,10 +84,12 @@ extern unsigned long VMALLOC_RESERVE /* = CONFIG_VMALLOC_RESERVE */;
 /* We have no pmd or pud since we are strictly a two-level page table */
 #include <asm-generic/pgtable-nopmd.h>
 
+static inline int pud_huge_page(pud_t pud)     { return 0; }
+
 /* We don't define any pgds for these addresses. */
 static inline int pgd_addr_invalid(unsigned long addr)
 {
-       return addr >= MEM_HV_INTRPT;
+       return addr >= MEM_HV_START;
 }
 
 /*