powerpc/mpc85xx: Update clock nodes in device tree
[firefly-linux-kernel-4.4.55.git] / arch / powerpc / boot / dts / fsl / b4860si-post.dtsi
index 981397518fc6243919e78118944d8dda2f763f6b..cbc354b05117344342bab0d839749e19a0f2b832 100644 (file)
 
        clockgen: global-utilities@e1000 {
                compatible = "fsl,b4860-clockgen", "fsl,qoriq-clockgen-2.0";
+               ranges = <0x0 0xe1000 0x1000>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+
+               sysclk: sysclk {
+                       #clock-cells = <0>;
+                       compatible = "fsl,qoriq-sysclk-2.0";
+                       clock-output-names = "sysclk";
+               };
+
+               pll0: pll0@800 {
+                       #clock-cells = <1>;
+                       reg = <0x800 0x4>;
+                       compatible = "fsl,qoriq-core-pll-2.0";
+                       clocks = <&sysclk>;
+                       clock-output-names = "pll0", "pll0-div2", "pll0-div4";
+               };
+
+               pll1: pll1@820 {
+                       #clock-cells = <1>;
+                       reg = <0x820 0x4>;
+                       compatible = "fsl,qoriq-core-pll-2.0";
+                       clocks = <&sysclk>;
+                       clock-output-names = "pll1", "pll1-div2", "pll1-div4";
+               };
+
+               mux0: mux0@0 {
+                       #clock-cells = <0>;
+                       reg = <0x0 0x4>;
+                       compatible = "fsl,qoriq-core-mux-2.0";
+                       clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
+                               <&pll1 0>, <&pll1 1>, <&pll1 2>;
+                       clock-names = "pll0", "pll0-div2", "pll0-div4",
+                               "pll1", "pll1-div2", "pll1-div4";
+                       clock-output-names = "cmux0";
+               };
        };
 
        rcpm: global-utilities@e2000 {