Merge branches 'arm', 'at91', 'bcmring', 'ep93xx', 'mach-types', 'misc' and 'w90x900...

[firefly-linux-kernel-4.4.55.git] / arch / mips / lib / csum_partial.S

diff --git a/arch/mips/lib/csum_partial.S b/arch/mips/lib/csum_partial.S
index edac9892c51a19a5e8084ad26ca5584d54c78499..6b876ca299eeb4d4d7f684a441e70158942968b1 100644 (file)
--- a/arch/mips/lib/csum_partial.S
+++ b/arch/mips/lib/csum_partial.S
@@ -55,20 +55,14 @@
 #define UNIT(unit)  ((unit)*NBYTES)
 
 #define ADDC(sum,reg)                                          \
-       .set    push;                                           \
-       .set    noat;                                           \
        ADD     sum, reg;                                       \
        sltu    v1, sum, reg;                                   \
        ADD     sum, v1;                                        \
-       .set    pop
 
 #define ADDC32(sum,reg)                                                \
-       .set    push;                                           \
-       .set    noat;                                           \
        addu    sum, reg;                                       \
        sltu    v1, sum, reg;                                   \
        addu    sum, v1;                                        \
-       .set    pop
 
 #define CSUM_BIGCHUNK1(src, offset, sum, _t0, _t1, _t2, _t3)   \
        LOAD    _t0, (offset + UNIT(0))(src);                   \
@@ -267,8 +261,6 @@ LEAF(csum_partial)
 1:     ADDC(sum, t1)
 
        /* fold checksum */
-       .set    push
-       .set    noat
 #ifdef USE_DOUBLE
        dsll32  v1, sum, 0
        daddu   sum, v1
@@ -276,21 +268,22 @@ LEAF(csum_partial)
        dsra32  sum, sum, 0
        addu    sum, v1
 #endif
-       sll     v1, sum, 16
-       addu    sum, v1
-       sltu    v1, sum, v1
-       srl     sum, sum, 16
-       addu    sum, v1
 
        /* odd buffer alignment? */
-       beqz    t7, 1f
-        nop
-       sll     v1, sum, 8
+#ifdef CPU_MIPSR2
+       wsbh    v1, sum
+       movn    sum, v1, t7
+#else
+       beqz    t7, 1f                  /* odd buffer alignment? */
+        lui    v1, 0x00ff
+       addu    v1, 0x00ff
+       and     t0, sum, v1
+       sll     t0, t0, 8
        srl     sum, sum, 8
-       or      sum, v1
-       andi    sum, 0xffff
-       .set    pop
+       and     sum, sum, v1
+       or      sum, sum, t0
 1:
+#endif
        .set    reorder
        /* Add the passed partial csum.  */
        ADDC32(sum, a2)
@@ -669,8 +662,6 @@ EXC(        sb      t0, NBYTES-2(dst), .Ls_exc)
        ADDC(sum, t2)
 .Ldone:
        /* fold checksum */
-       .set    push
-       .set    noat
 #ifdef USE_DOUBLE
        dsll32  v1, sum, 0
        daddu   sum, v1
@@ -678,21 +669,21 @@ EXC(      sb      t0, NBYTES-2(dst), .Ls_exc)
        dsra32  sum, sum, 0
        addu    sum, v1
 #endif
-       sll     v1, sum, 16
-       addu    sum, v1
-       sltu    v1, sum, v1
-       srl     sum, sum, 16
-       addu    sum, v1
 
-       /* odd buffer alignment? */
-       beqz    odd, 1f
-        nop
-       sll     v1, sum, 8
+#ifdef CPU_MIPSR2
+       wsbh    v1, sum
+       movn    sum, v1, odd
+#else
+       beqz    odd, 1f                 /* odd buffer alignment? */
+        lui    v1, 0x00ff
+       addu    v1, 0x00ff
+       and     t0, sum, v1
+       sll     t0, t0, 8
        srl     sum, sum, 8
-       or      sum, v1
-       andi    sum, 0xffff
-       .set    pop
+       and     sum, sum, v1
+       or      sum, sum, t0
 1:
+#endif
        .set reorder
        ADDC32(sum, psum)
        jr      ra