Merge branch 'mips-next' of http://dev.phrozen.org/githttp/mips-next into mips-for...

[firefly-linux-kernel-4.4.55.git] / arch / mips / lantiq / xway / dma.c

diff --git a/arch/mips/lantiq/xway/dma.c b/arch/mips/lantiq/xway/dma.c
index b5d76d1444c98877c8dcbc9f6563a7b7c35e5d83..6453962ac898f86222587ec98184af6244a812a1 100644 (file)
--- a/arch/mips/lantiq/xway/dma.c
+++ b/arch/mips/lantiq/xway/dma.c
@@ -49,7 +49,7 @@
 #define DMA_CLK_DIV4           BIT(6)          /* polling clock divider */
 #define DMA_2W_BURST           BIT(1)          /* 2 word burst length */
 #define DMA_MAX_CHANNEL                20              /* the soc has 20 channels */
-#define DMA_ETOP_ENDIANESS     (0xf << 8) /* endianess swap etop channels */
+#define DMA_ETOP_ENDIANNESS    (0xf << 8) /* endianness swap etop channels */
 #define DMA_WEIGHT     (BIT(17) | BIT(16))     /* default channel wheight */
 
 #define ltq_dma_r32(x)                 ltq_r32(ltq_dma_membase + (x))
@@ -192,10 +192,10 @@ ltq_dma_init_port(int p)
        switch (p) {
        case DMA_PORT_ETOP:
                /*
-                * Tell the DMA engine to swap the endianess of data frames and
+                * Tell the DMA engine to swap the endianness of data frames and
                 * drop packets if the channel arbitration fails.
                 */
-               ltq_dma_w32_mask(0, DMA_ETOP_ENDIANESS | DMA_PDEN,
+               ltq_dma_w32_mask(0, DMA_ETOP_ENDIANNESS | DMA_PDEN,
                        LTQ_DMA_PCTRL);
                break;