MIPS: CM3: Add support for CM3 L2 cache.

[firefly-linux-kernel-4.4.55.git] / arch / mips / Kconfig

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 199a8357838cb24bde2ce5ed5dec7db62feb8d2e..60d7ae76dd7e594a791c023427ce7cf4548cbc87 100644 (file)
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -2113,7 +2113,7 @@ config CPU_R4K_CACHE_TLB
 
 config MIPS_MT_SMP
        bool "MIPS MT SMP support (1 TC on each available VPE)"
-       depends on SYS_SUPPORTS_MULTITHREADING
+       depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6
        select CPU_MIPSR2_IRQ_VI
        select CPU_MIPSR2_IRQ_EI
        select SYNC_R4K
@@ -2214,7 +2214,7 @@ config MIPS_VPE_APSP_API_MT
 
 config MIPS_CMP
        bool "MIPS CMP framework support (DEPRECATED)"
-       depends on SYS_SUPPORTS_MIPS_CMP
+       depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
        select MIPS_GIC_IPI
        select SMP
        select SYNC_R4K
@@ -2231,7 +2231,7 @@ config MIPS_CMP
 
 config MIPS_CPS
        bool "MIPS Coherent Processing System support"
-       depends on SYS_SUPPORTS_MIPS_CPS
+       depends on SYS_SUPPORTS_MIPS_CPS && !CPU_MIPSR6
        select MIPS_CM
        select MIPS_CPC
        select MIPS_CPS_PM if HOTPLUG_CPU