rk: revert to v3.10

[firefly-linux-kernel-4.4.55.git] / arch / arm64 / include / asm / pgtable-hwdef.h

diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h
index f7af66b54cb216931f23718cc75754d269acefc4..75fd13d289b93193f261c89fa83fb6973738f6f2 100644 (file)
--- a/arch/arm64/include/asm/pgtable-hwdef.h
+++ b/arch/arm64/include/asm/pgtable-hwdef.h
@@ -25,27 +25,16 @@
 /*
  * Hardware page table definitions.
  *
- * Level 1 descriptor (PUD).
- */
-
-#define PUD_TABLE_BIT          (_AT(pgdval_t, 1) << 1)
-
-/*
  * Level 2 descriptor (PMD).
  */
 #define PMD_TYPE_MASK          (_AT(pmdval_t, 3) << 0)
 #define PMD_TYPE_FAULT         (_AT(pmdval_t, 0) << 0)
 #define PMD_TYPE_TABLE         (_AT(pmdval_t, 3) << 0)
 #define PMD_TYPE_SECT          (_AT(pmdval_t, 1) << 0)
-#define PMD_TABLE_BIT          (_AT(pmdval_t, 1) << 1)
 
 /*
  * Section
  */
-#define PMD_SECT_VALID         (_AT(pmdval_t, 1) << 0)
-#define PMD_SECT_PROT_NONE     (_AT(pmdval_t, 1) << 58)
-#define PMD_SECT_USER          (_AT(pmdval_t, 1) << 6)         /* AP[1] */
-#define PMD_SECT_RDONLY                (_AT(pmdval_t, 1) << 7)         /* AP[2] */
 #define PMD_SECT_S             (_AT(pmdval_t, 3) << 8)
 #define PMD_SECT_AF            (_AT(pmdval_t, 1) << 10)
 #define PMD_SECT_NG            (_AT(pmdval_t, 1) << 11)
@@ -64,7 +53,6 @@
 #define PTE_TYPE_MASK          (_AT(pteval_t, 3) << 0)
 #define PTE_TYPE_FAULT         (_AT(pteval_t, 0) << 0)
 #define PTE_TYPE_PAGE          (_AT(pteval_t, 3) << 0)
-#define PTE_TABLE_BIT          (_AT(pteval_t, 1) << 1)
 #define PTE_USER               (_AT(pteval_t, 1) << 6)         /* AP[1] */
 #define PTE_RDONLY             (_AT(pteval_t, 1) << 7)         /* AP[2] */
 #define PTE_SHARED             (_AT(pteval_t, 3) << 8)         /* SH[1:0], inner shareable */
@@ -80,29 +68,9 @@
 #define PTE_ATTRINDX_MASK      (_AT(pteval_t, 7) << 2)
 
 /*
- * 2nd stage PTE definitions
- */
-#define PTE_S2_RDONLY          (_AT(pteval_t, 1) << 6)   /* HAP[2:1] */
-#define PTE_S2_RDWR            (_AT(pteval_t, 3) << 6)   /* HAP[2:1] */
-
-#define PMD_S2_RDWR            (_AT(pmdval_t, 3) << 6)   /* HAP[2:1] */
-
-/*
- * Memory Attribute override for Stage-2 (MemAttr[3:0])
- */
-#define PTE_S2_MEMATTR(t)      (_AT(pteval_t, (t)) << 2)
-#define PTE_S2_MEMATTR_MASK    (_AT(pteval_t, 0xf) << 2)
-
-/*
- * EL2/HYP PTE/PMD definitions
- */
-#define PMD_HYP                        PMD_SECT_USER
-#define PTE_HYP                        PTE_USER
-
-/*
- * Highest possible physical address supported.
+ * 40-bit physical address supported.
  */
-#define PHYS_MASK_SHIFT                (48)
+#define PHYS_MASK_SHIFT                (40)
 #define PHYS_MASK              ((UL(1) << PHYS_MASK_SHIFT) - 1)
 
 /*
@@ -122,7 +90,7 @@
 #define TCR_SHARED             ((UL(3) << 12) | (UL(3) << 28))
 #define TCR_TG0_64K            (UL(1) << 14)
 #define TCR_TG1_64K            (UL(1) << 30)
+#define TCR_IPS_40BIT          (UL(2) << 32)
 #define TCR_ASID16             (UL(1) << 36)
-#define TCR_TBI0               (UL(1) << 37)
 
 #endif