Merge tag 'v3.10.53' into linux-linaro-lsk

[firefly-linux-kernel-4.4.55.git] / arch / arm64 / include / asm / cacheflush.h

diff --git a/arch/arm64/include/asm/cacheflush.h b/arch/arm64/include/asm/cacheflush.h
index d6ac12e11867b81f3b9e66cc7a1659aa4843f679..f2defe1c380c07482449e995fdb1d89588b550f9 100644 (file)
--- a/arch/arm64/include/asm/cacheflush.h
+++ b/arch/arm64/include/asm/cacheflush.h
@@ -123,7 +123,7 @@ extern void flush_dcache_page(struct page *);
 static inline void __flush_icache_all(void)
 {
        asm("ic ialluis");
-       dsb();
+       dsb(ish);
 }
 
 #define flush_dcache_mmap_lock(mapping) \
@@ -131,9 +131,6 @@ static inline void __flush_icache_all(void)
 #define flush_dcache_mmap_unlock(mapping) \
        spin_unlock_irq(&(mapping)->tree_lock)
 
-#define flush_icache_user_range(vma,page,addr,len) \
-       flush_dcache_page(page)
-
 /*
  * We don't appear to need to do anything here.  In fact, if we did, we'd
  * duplicate cache flushing elsewhere performed by flush_dcache_page().
@@ -141,19 +138,10 @@ static inline void __flush_icache_all(void)
 #define flush_icache_page(vma,page)    do { } while (0)
 
 /*
- * flush_cache_vmap() is used when creating mappings (eg, via vmap,
- * vmalloc, ioremap etc) in kernel space for pages.  On non-VIPT
- * caches, since the direct-mappings of these pages may contain cached
- * data, we need to do a full cache flush to ensure that writebacks
- * don't corrupt data placed into these pages via the new mappings.
+ * Not required on AArch64 (PIPT or VIPT non-aliasing D-cache).
  */
 static inline void flush_cache_vmap(unsigned long start, unsigned long end)
 {
-       /*
-        * set_pte_at() called from vmap_pte_range() does not
-        * have a DSB after cleaning the cache line.
-        */
-       dsb();
 }
 
 static inline void flush_cache_vunmap(unsigned long start, unsigned long end)