clk: rockchip: update dt-binding header for rk3399

[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rockchip / rk3399.dtsi

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 9fa6183db7664fe069a10ed3b9e3b5823fb4a118..edf687860fd4e778475433c612cf9d393f5af0c1 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -212,7 +212,7 @@
                        interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
                        #dma-cells = <1>;
-                       clocks = <&cru ACLK_DMAC_BUS>;
+                       clocks = <&cru ACLK_DMAC0_PERILP>;
                        clock-names = "apb_pclk";
                };
 
@@ -222,7 +222,7 @@
                        interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
                        #dma-cells = <1>;
-                       clocks = <&cru ACLK_DMAC_PERI>;
+                       clocks = <&cru ACLK_DMAC1_PERILP>;
                        clock-names = "apb_pclk";
                };
        };
@@ -279,7 +279,7 @@
        uart4: serial@ff370000 {
                compatible = "rockchip,rk3399-uart", "snps,dw-apb-uart";
                reg = <0x0 0xff370000 0x0 0x100>;
-               clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
+               clocks = <&cru SCLK_UART4_PMU>, <&cru PCLK_UART4_PMU>;
                clock-names = "baudclk", "apb_pclk";
                interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
                reg-shift = <2>;