ARM64: dts: rk3399: support cluster idle feature
[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rockchip / rk3399.dtsi
index 5319b88363feea3c130b61a852c1f2e99f22a999..1a0297c7a3060393f949470dcbd06f7a5e886eda 100644 (file)
                        #cooling-cells = <2>; /* min followed by max */
                        dynamic-power-coefficient = <100>;
                        clocks = <&cru ARMCLKL>;
-                       cpu-idle-states = <&cpu_sleep>;
+                       cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
                        operating-points-v2 = <&cluster0_opp>;
                        sched-energy-costs = <&CPU_COST_A53 &CLUSTER_COST_A53>;
                };
                        reg = <0x0 0x1>;
                        enable-method = "psci";
                        clocks = <&cru ARMCLKL>;
-                       cpu-idle-states = <&cpu_sleep>;
+                       cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
                        operating-points-v2 = <&cluster0_opp>;
                        sched-energy-costs = <&CPU_COST_A53 &CLUSTER_COST_A53>;
                };
                        reg = <0x0 0x2>;
                        enable-method = "psci";
                        clocks = <&cru ARMCLKL>;
-                       cpu-idle-states = <&cpu_sleep>;
+                       cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
                        operating-points-v2 = <&cluster0_opp>;
                        sched-energy-costs = <&CPU_COST_A53 &CLUSTER_COST_A53>;
                };
                        reg = <0x0 0x3>;
                        enable-method = "psci";
                        clocks = <&cru ARMCLKL>;
-                       cpu-idle-states = <&cpu_sleep>;
+                       cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
                        operating-points-v2 = <&cluster0_opp>;
                        sched-energy-costs = <&CPU_COST_A53 &CLUSTER_COST_A53>;
                };
                        #cooling-cells = <2>; /* min followed by max */
                        dynamic-power-coefficient = <436>;
                        clocks = <&cru ARMCLKB>;
-                       cpu-idle-states = <&cpu_sleep>;
+                       cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
                        operating-points-v2 = <&cluster1_opp>;
                        sched-energy-costs = <&CPU_COST_A72 &CLUSTER_COST_A72>;
                };
                        reg = <0x0 0x101>;
                        enable-method = "psci";
                        clocks = <&cru ARMCLKB>;
-                       cpu-idle-states = <&cpu_sleep>;
+                       cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
                        operating-points-v2 = <&cluster1_opp>;
                        sched-energy-costs = <&CPU_COST_A72 &CLUSTER_COST_A72>;
                };
 
                idle-states {
                        entry-method = "psci";
-                       cpu_sleep: cpu-sleep-0 {
+
+                       CPU_SLEEP: cpu-sleep {
                                compatible = "arm,idle-state";
                                local-timer-stop;
                                arm,psci-suspend-param = <0x0010000>;
-                               entry-latency-us = <350>;
-                               exit-latency-us = <600>;
-                               min-residency-us = <1150>;
+                               entry-latency-us = <120>;
+                               exit-latency-us = <250>;
+                               min-residency-us = <900>;
+                       };
+
+                       CLUSTER_SLEEP: cluster-sleep {
+                               compatible = "arm,idle-state";
+                               local-timer-stop;
+                               arm,psci-suspend-param = <0x1010000>;
+                               entry-latency-us = <400>;
+                               exit-latency-us = <500>;
+                               min-residency-us = <2000>;
                        };
                };
 
                };
        };
 
+       cpu_avs: cpu-avs {
+               cluster0-avs {
+                       cluster-id = <0>;
+                       min-volt = <800000>; /* uV */
+                       min-freq = <408000>; /* KHz */
+                       leakage-adjust-volt = <
+                       /*  mA        mA         uV */
+                           0         254        0
+                       >;
+                       nvmem-cells = <&cpul_leakage>;
+                       nvmem-cell-names = "cpu_leakage";
+               };
+               cluster1-avs {
+                       cluster-id = <1>;
+                       min-volt = <800000>; /* uV */
+                       min-freq = <408000>; /* KHz */
+                       leakage-adjust-volt = <
+                       /*  mA        mA         uV */
+                           0         254        0
+                       >;
+                       nvmem-cells = <&cpub_leakage>;
+                       nvmem-cell-names = "cpu_leakage";
+               };
+       };
+
        timer {
                compatible = "arm,armv8-timer";
                interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW 0>,
                status = "disabled";
        };
 
-       emmc_phy: phy {
-               compatible = "rockchip,rk3399-emmc-phy";
-               reg-offset = <0xf780>;
-               #phy-cells = <0>;
-               rockchip,grf = <&grf>;
-               ctrl-base = <0xfe330000>;
-               status = "disabled";
-       };
-
        sdio0: dwmmc@fe310000 {
                compatible = "rockchip,rk3399-dw-mshc",
                             "rockchip,rk3288-dw-mshc";
                compatible = "rockchip,rk3399-sdhci-5.1", "arasan,sdhci-5.1";
                reg = <0x0 0xfe330000 0x0 0x10000>;
                interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH 0>;
-               clocks = <&cru SCLK_EMMC>, <&cru ACLK_EMMC>;
-               clock-names = "clk_xin", "clk_ahb";
+               arasan,soc-ctl-syscon = <&grf>;
                assigned-clocks = <&cru SCLK_EMMC>;
-               assigned-clock-parents = <&cru PLL_CPLL>;
                assigned-clock-rates = <200000000>;
+               clocks = <&cru SCLK_EMMC>, <&cru ACLK_EMMC>;
+               clock-names = "clk_xin", "clk_ahb";
+               clock-output-names = "emmc_cardclock";
+               #clock-cells = <0>;
                phys = <&emmc_phy>;
                phy-names = "phy_arasan";
                power-domains = <&power RK3399_PD_EMMC>;
                        reg = <0x0 0xfe800000 0x0 0x100000>;
                        interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0>;
                        dr_mode = "otg";
-                       phys = <&u2phy0_otg>, <&tcphy0 1>;
+                       phys = <&u2phy0_otg>, <&tcphy0_usb3>;
                        phy-names = "usb2-phy", "usb3-phy";
                        phy_type = "utmi_wide";
                        snps,dis_enblslpm_quirk;
                        snps,dis-u2-freeclk-exists-quirk;
+                       snps,dis_u2_susphy_quirk;
                        snps,dis-del-phy-power-chg-quirk;
                        snps,xhci-slow-suspend-quirk;
                        status = "disabled";
                        reg = <0x0 0xfe900000 0x0 0x100000>;
                        interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
                        dr_mode = "host";
-                       phys = <&u2phy1_otg>, <&tcphy1 1>;
+                       phys = <&u2phy1_otg>, <&tcphy1_usb3>;
                        phy-names = "usb2-phy", "usb3-phy";
                        phy_type = "utmi_wide";
                        snps,dis_enblslpm_quirk;
                        snps,dis-u2-freeclk-exists-quirk;
+                       snps,dis_u2_susphy_quirk;
                        snps,dis-del-phy-power-chg-quirk;
                        snps,xhci-slow-suspend-quirk;
                        status = "disabled";
                #address-cells = <1>;
                #size-cells = <1>;
 
+               emmc_phy: phy@f780 {
+                       compatible = "rockchip,rk3399-emmc-phy";
+                       reg = <0xf780 0x24>;
+                       clocks = <&sdhci>;
+                       clock-names = "emmcclk";
+                       #phy-cells = <0>;
+                       status = "disabled";
+               };
+
                u2phy0: usb2-phy@e450 {
                        compatible = "rockchip,rk3399-usb2phy";
                        reg = <0xe450 0x10>;
 
                        u2phy1_otg: otg-port {
                                #phy-cells = <0>;
-                               interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
-                                            <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
-                                            <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0>,
+                                            <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 0>,
+                                            <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH 0>;
                                interrupt-names = "otg-bvalid", "otg-id",
                                                  "linestate";
                                status = "disabled";
                reset-names = "uphy", "uphy-pipe", "uphy-tcphy";
                rockchip,typec-conn-dir = <0xe580 0 16>;
                rockchip,usb3tousb2-en = <0xe580 3 19>;
+               rockchip,usb3-host-disable = <0x2434 0 16>;
+               rockchip,usb3-host-port = <0x2434 12 28>;
                rockchip,external-psm = <0xe588 14 30>;
                rockchip,pipe-status = <0xe5c0 0 0>;
                rockchip,uphy-dp-sel = <0x6268 19 19>;
                status = "disabled";
+
+               tcphy0_dp: dp-port {
+                       #phy-cells = <0>;
+               };
+
+               tcphy0_usb3: usb3-port {
+                       #phy-cells = <0>;
+               };
        };
 
        tcphy1: phy@ff800000 {
                reset-names = "uphy", "uphy-pipe", "uphy-tcphy";
                rockchip,typec-conn-dir = <0xe58c 0 16>;
                rockchip,usb3tousb2-en = <0xe58c 3 19>;
+               rockchip,usb3-host-disable = <0x2444 0 16>;
+               rockchip,usb3-host-port = <0x2444 12 28>;
                rockchip,external-psm = <0xe594 14 30>;
                rockchip,pipe-status = <0xe5c0 16 16>;
                rockchip,uphy-dp-sel = <0x6268 3 19>;
                status = "disabled";
+
+               tcphy1_dp: dp-port {
+                       #phy-cells = <0>;
+               };
+
+               tcphy1_usb3: usb3-port {
+                       #phy-cells = <0>;
+               };
        };
 
        watchdog@ff848000 {
                interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH 0>;
                clocks = <&cru PCLK_EDP>, <&cru PCLK_EDP_CTRL>;
                clock-names = "dp", "pclk";
+               power-domains = <&power RK3399_PD_EDP>;
                resets = <&cru SRST_P_EDP_CTRL>;
                reset-names = "dp";
                rockchip,grf = <&grf>;