Merge branch 'linux-linaro-lsk-v4.4-android' of git://git.linaro.org/kernel/linux...

[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rockchip / rk3368.dtsi

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index e73d619823eebc8174e2cf0f2af76344d986284b..fd69e074c0252adb37b35bb0b96d74246307ef56 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -207,25 +207,25 @@
                compatible = "operating-points-v2";
                opp-shared;
 
-               opp00 {
+               opp@408000000 {
                        opp-hz = /bits/ 64 <408000000>;
                        opp-microvolt = <1200000>;
                        clock-latency-ns = <40000>;
                        opp-suspend;
                };
-               opp01 {
+               opp@600000000 {
                        opp-hz = /bits/ 64 <600000000>;
                        opp-microvolt = <1200000>;
                };
-               opp02 {
+               opp@816000000 {
                        opp-hz = /bits/ 64 <816000000>;
                        opp-microvolt = <1200000>;
                };
-               opp03 {
+               opp@1008000000 {
                        opp-hz = /bits/ 64 <1008000000>;
                        opp-microvolt = <1200000>;
                };
-               opp04 {
+               opp@1200000000 {
                        opp-hz = /bits/ 64 <1200000000>;
                        opp-microvolt = <1200000>;
                };
@@ -235,21 +235,21 @@
                compatible = "operating-points-v2";
                opp-shared;
 
-               opp00 {
+               opp@408000000 {
                        opp-hz = /bits/ 64 <408000000>;
                        opp-microvolt = <1200000>;
                        clock-latency-ns = <40000>;
                        opp-suspend;
                };
-               opp01 {
+               opp@600000000 {
                        opp-hz = /bits/ 64 <600000000>;
                        opp-microvolt = <1200000>;
                };
-               opp02 {
+               opp@816000000 {
                        opp-hz = /bits/ 64 <816000000>;
                        opp-microvolt = <1200000>;
                };
-               opp03 {
+               opp@1008000000 {
                        opp-hz = /bits/ 64 <1008000000>;
                        opp-microvolt = <1200000>;
                };
@@ -284,6 +284,8 @@
                        #dma-cells = <1>;
                        clocks = <&cru ACLK_DMAC_PERI>;
                        clock-names = "apb_pclk";
+                       arm,pl330-broken-no-flushp;
+                       peripherals-req-type-burst;
                };
 
                dmac_bus: dma-controller@ff600000 {
@@ -294,6 +296,8 @@
                        #dma-cells = <1>;
                        clocks = <&cru ACLK_DMAC_BUS>;
                        clock-names = "apb_pclk";
+                       arm,pl330-broken-no-flushp;
+                       peripherals-req-type-burst;
                };
        };
 
@@ -362,6 +366,8 @@
                #io-channel-cells = <1>;
                clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
                clock-names = "saradc", "apb_pclk";
+               resets = <&cru SRST_SARADC>;
+               reset-names = "saradc-apb";
                status = "disabled";
        };
 
@@ -788,7 +794,7 @@
                #address-cells = <0>;
 
                reg = <0x0 0xffb71000 0x0 0x1000>,
-                     <0x0 0xffb72000 0x0 0x1000>,
+                     <0x0 0xffb72000 0x0 0x2000>,
                      <0x0 0xffb74000 0x0 0x2000>,
                      <0x0 0xffb76000 0x0 0x2000>;
                interrupts = <GIC_PPI 9