enable-method = "psci";
clocks = <&cru ARMCLKL>;
operating-points-v2 = <&cluster0_opp>;
+ sched-energy-costs = <&RK3368_CPU_COST_0 &RK3368_CLUSTER_COST_0>;
#cooling-cells = <2>; /* min followed by max */
dynamic-power-coefficient = <149>;
};
enable-method = "psci";
clocks = <&cru ARMCLKL>;
operating-points-v2 = <&cluster0_opp>;
+ sched-energy-costs = <&RK3368_CPU_COST_0 &RK3368_CLUSTER_COST_0>;
};
cpu_l2: cpu@2 {
enable-method = "psci";
clocks = <&cru ARMCLKL>;
operating-points-v2 = <&cluster0_opp>;
+ sched-energy-costs = <&RK3368_CPU_COST_0 &RK3368_CLUSTER_COST_0>;
};
cpu_l3: cpu@3 {
enable-method = "psci";
clocks = <&cru ARMCLKL>;
operating-points-v2 = <&cluster0_opp>;
+ sched-energy-costs = <&RK3368_CPU_COST_0 &RK3368_CLUSTER_COST_0>;
};
cpu_b0: cpu@100 {
enable-method = "psci";
clocks = <&cru ARMCLKB>;
operating-points-v2 = <&cluster1_opp>;
+ sched-energy-costs = <&RK3368_CPU_COST_1 &RK3368_CLUSTER_COST_1>;
#cooling-cells = <2>; /* min followed by max */
dynamic-power-coefficient = <160>;
};
enable-method = "psci";
clocks = <&cru ARMCLKB>;
operating-points-v2 = <&cluster1_opp>;
+ sched-energy-costs = <&RK3368_CPU_COST_1 &RK3368_CLUSTER_COST_1>;
};
cpu_b2: cpu@102 {
enable-method = "psci";
clocks = <&cru ARMCLKB>;
operating-points-v2 = <&cluster1_opp>;
+ sched-energy-costs = <&RK3368_CPU_COST_1 &RK3368_CLUSTER_COST_1>;
};
cpu_b3: cpu@103 {
enable-method = "psci";
clocks = <&cru ARMCLKB>;
operating-points-v2 = <&cluster1_opp>;
+ sched-energy-costs = <&RK3368_CPU_COST_1 &RK3368_CLUSTER_COST_1>;
};
};
};
};
+ energy-costs {
+ RK3368_CPU_COST_0: rk3368-core-cost0 {
+ busy-cost-data = <
+ 146 44 /* 216M */
+ 276 72 /* 408M */
+ 406 99 /* 600M */
+ 552 147 /* 816M */
+ 682 200 /* 1008M */
+ 812 255 /* 1200M */
+ >;
+ idle-cost-data = <
+ 6
+ 6
+ 0
+ >;
+ };
+
+ RK3368_CPU_COST_1: rk3368-core-cost1 {
+ busy-cost-data = <
+ 146 53 /* 216M */
+ 276 86 /* 408M */
+ 406 118 /* 600M */
+ 552 166 /* 816M */
+ 682 226 /* 1008M */
+ 812 309 /* 1200M */
+ 878 371 /* 1200M */
+ 959 446 /* 1416M */
+ 1024 513 /* 1512M */
+ >;
+ idle-cost-data = <
+ 6
+ 6
+ 0
+ >;
+ };
+
+ RK3368_CLUSTER_COST_0: rk3368-cluster-cost0 {
+ busy-cost-data = <
+ 146 9 /* 216M */
+ 276 14 /* 408M */
+ 406 20 /* 600M */
+ 552 29 /* 816M */
+ 682 40 /* 1008M */
+ 812 51 /* 1200M */
+ >;
+ idle-cost-data = <
+ 56
+ 56
+ 56
+ >;
+ };
+
+ RK3368_CLUSTER_COST_1: rk3368-cluster-cost1 {
+ busy-cost-data = <
+ 146 11 /* 216M */
+ 276 17 /* 408M */
+ 406 24 /* 600M */
+ 552 33 /* 816M */
+ 682 45 /* 1008M */
+ 812 62 /* 1200M */
+ 878 74 /* 1200M */
+ 959 89 /* 1416M */
+ 1024 103 /* 1512M */
+ >;
+ idle-cost-data = <
+ 56
+ 56
+ 56
+ >;
+ };
+ };
+
cpu_avs: cpu-avs {
cluster0-avs {
cluster-id = <0>;
#address-cells = <1>;
#size-cells = <1>;
+ edp_phy: edp-phy {
+ compatible = "rockchip,rk3368-dp-phy";
+ clocks = <&cru SCLK_EDP_24M>;
+ clock-names = "24m";
+ resets = <&cru SRST_EDP_24M>;
+ reset-names = "edp_24m";
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
io_domains: io-domains {
compatible = "rockchip,rk3368-io-voltage-domain";
status = "disabled";
reg = <0>;
remote-endpoint = <&mipi_in_vop>;
};
+
+ vop_out_edp: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&edp_in_vop>;
+ };
};
};
status = "disabled";
};
+ edp: edp@ff970000 {
+ compatible = "rockchip,rk3368-edp";
+ reg = <0x0 0xff970000 0x0 0x8000>;
+ interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_EDP>, <&cru PCLK_EDP_CTRL>;
+ clock-names = "dp", "pclk";
+ resets = <&cru SRST_EDP>;
+ reset-names = "dp";
+ power-domains = <&power RK3368_PD_VIO>;
+ rockchip,grf = <&grf>;
+ phys = <&edp_phy>;
+ phy-names = "dp";
+ pinctrl-names = "default";
+ pinctrl-0 = <&edp_hpd>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ edp_in: port@0 {
+ reg = <0>;
+
+ edp_in_vop: endpoint {
+ remote-endpoint = <&vop_out_edp>;
+ };
+ };
+ };
+ };
+
hevc_mmu: iommu@ff9a0440 {
compatible = "rockchip,iommu";
reg = <0x0 0xff9a0440 0x0 0x40>,
drive-strength = <12>;
};
+ edp {
+ edp_hpd: edp-hpd {
+ rockchip,pins = <2 23 RK_FUNC_2 &pcfg_pull_none>;
+ };
+ };
+
emmc {
emmc_clk: emmc-clk {
rockchip,pins = <2 4 RK_FUNC_2 &pcfg_pull_none>;