status = "disabled";
};
+ usbphy: phy {
+ compatible = "rockchip,rk336x-usb-phy";
+ rockchip,grf = <&grf>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ usbphy0: usb-phy0 {
+ #phy-cells = <0>;
+ #clock-cells = <0>;
+ reg = <0x700>;
+ };
+
+ usbphy1: usb-phy1 {
+ #phy-cells = <0>;
+ #clock-cells = <0>;
+ reg = <0x728>;
+ };
+ };
+
usb_host0_echi: usb@ff480000 {
compatible = "generic-ehci";
reg = <0x0 0xff480000 0x0 0x20000>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_OTG_PHY0>, <&cru HCLK_HOST>;
clock-names = "sclk_otgphy0", "hclk_host0";
+ phys = <&usbphy1>;
+ phy-names = "usb";
status = "disabled";
};
status = "disabled";
};
+ iep: iep@ff900000 {
+ compatible = "rockchip,iep";
+ iommu_enabled = <1>;
+ reg = <0x0 0xff900000 0x0 0x800>;
+ interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
+ clock-names = "aclk_iep", "hclk_iep";
+ version = <2>;
+ status = "disabled";
+ };
+
rga: rga@ff920000 {
compatible = "rockchip,rga2";
dev_mode = <1>;
status = "disabled";
};
+ iep_mmu: iep-mmu {
+ dbgname = "iep";
+ compatible = "rockchip,iep_mmu";
+ reg = <0x0 0xff900800 0x0 0x100>;
+ interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "iep_mmu";
+ status = "disabled";
+ };
+
vpu_mmu: vpu_mmu {
dbgname = "vpu";
compatible = "rockchip,vpu_mmu";
status = "disabled";
};
+ vpu: vpu_service@ff9a0000 {
+ compatible = "rockchip,vpu_service";
+ rockchip,grf = <&grf>;
+ iommu_enabled = <1>;
+ reg = <0x0 0xff9a0000 0x0 0x800>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "irq_dec", "irq_enc";
+ clocks = <&cru ACLK_VIDEO>, <&cru HCLK_VIDEO>;
+ clock-names = "aclk_vcodec", "hclk_vcodec";
+ resets = <&cru SRST_VIDEO_AHB>, <&cru SRST_VIDEO_AXI>;
+ reset-names = "video_h", "video_a";
+ name = "vpu_service";
+ dev_mode = <0>;
+ status = "disabled";
+ };
+
+ rkvdec: rkvdec@ff9b0000 {
+ compatible = "rockchip,rkvdec";
+ rockchip,grf = <&grf>;
+ iommu_enabled = <1>;
+ reg = <0x0 0xff9b0000 0x0 0x400>;
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "irq_dec";
+ clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>,<&cru SCLK_HEVC_CABAC>,<&cru SCLK_HEVC_CORE>;
+ clock-names = "aclk_vcodec", "hclk_vcodec", "clk_cabac", "clk_core";
+ resets = <&cru SRST_RKVDEC_AHB>, <&cru SRST_VIDEO_AXI>;
+ reset-names = "video_h", "video_a";
+ dev_mode = <2>;
+ name = "rkvdec";
+ status = "disabled";
+ };
+
pinctrl: pinctrl {
compatible = "rockchip,rk3366-pinctrl";
rockchip,grf = <&grf>;
clocks = <&cru ACLK_GPU>;
clock-names = "clk_mali";
-
- operating-points = <
- /* KHz uV */
- 500000 1150000
- 420000 1050000
- 300000 950000
- 200000 900000
- 100000 900000 >;
+ operating-points-v2 = <&gpu_opp_table>;
status = "disabled";
};
+
+ gpu_opp_table: gpu_opp_table {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp00 {
+ opp-hz = /bits/ 64 <96000000>;
+ opp-microvolt = <1150000>;
+ };
+ opp01 {
+ opp-hz = /bits/ 64 <192000000>;
+ opp-microvolt = <1150000>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <288000000>;
+ opp-microvolt = <1150000>;
+ };
+ opp03 {
+ opp-hz = /bits/ 64 <375000000>;
+ opp-microvolt = <1150000>;
+ };
+ opp04 {
+ opp-hz = /bits/ 64 <480000000>;
+ opp-microvolt = <1150000>;
+ };
+ };
};