ARM64: dts: rockchip: configure EAS data for rk3368
[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rockchip / rk3328-evb.dts
index 10a983c1ffdd8eda2843979b688ac9882f126f71..4f502fe0d39433bad86915c5d4a014f0d048c45d 100644 (file)
@@ -54,7 +54,7 @@
        fiq-debugger {
                compatible = "rockchip,fiq-debugger";
                rockchip,serial-id = <2>;
-               rockchip,signal-irq = <135>;
+               rockchip,signal-irq = <145>;
                rockchip,wake-irq = <0>;
                /* If enable uart uses irq instead of fiq */
                rockchip,irq-mode-enable = <0>;
        };
 };
 
+&cpu0 {
+       cpu-supply = <&vdd_arm>;
+};
+
 &emmc {
        bus-width = <8>;
        cap-mmc-highspeed;
@@ -93,7 +97,7 @@
        phy-supply = <&vcc_phy>;
        phy-mode = "rgmii";
        clock_in_out = "input";
-       snps,reset-gpio = <&gpio1 18 GPIO_ACTIVE_LOW>;
+       snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
        snps,reset-active-low;
        snps,reset-delays-us = <0 10000 50000>;
        assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
        pmuio-supply = <&vcc_io>;
 };
 
+&tsadc {
+       status = "okay";
+};
+
 &u2phy {
-       otg-vbus-gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>;
+       otg-vbus-gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
        u2phy_host: host-port {
 };
 
 &u3phy {
-       vbus-drv-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
+       vbus-drv-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
        status = "okay";
 };
 
        pmic {
                pmic_int_l: pmic-int-l {
                rockchip,pins =
-                       <2 6 RK_FUNC_GPIO &pcfg_pull_up>;       /* gpio2_a6 */
+                       <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;  /* gpio2_a6 */
                };
        };
 };