rk3368 dtsi: modify dtsi for display module

[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rk3368.dtsi

diff --git a/arch/arm64/boot/dts/rk3368.dtsi b/arch/arm64/boot/dts/rk3368.dtsi
index 431f4bb8b69afe904dbc4e0388f7cee6d36c17aa..8f6a8889c3b5b20dfbfa99caa2b9b4280cbfeff1 100644 (file)
--- a/arch/arm64/boot/dts/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rk3368.dtsi
@@ -6,6 +6,7 @@
 #include <dt-bindings/pinctrl/rockchip-rk3288.h>
 
 #include "rk3368-clocks.dtsi"
+#include <dt-bindings/rkfb/rk_fb.h>
 
 / {
        compatible = "rockchip,rk3368";
@@ -249,6 +250,14 @@
                rockchip,check-idle = <1>;
                status = "disabled";
        };
+       fb: fb{
+               compatible = "rockchip,rk-fb";
+               rockchip,disp-mode = <NO_DUAL>;
+       };
+
+       rk_screen: rk_screen{
+               compatible = "rockchip,screen";
+       };
 
        uart_bt: serial@ff180000 {
                compatible = "rockchip,serial";
@@ -1000,4 +1009,28 @@
                        };
                };
        };
+
+       lvds: lvds@ff968000 {
+               compatible = "rockchip,rk3368-lvds";
+               reg = <0x0 0xff968000 0x0 0x4000>, <0x0 0xff9600b0 0x0 0x01>;
+               reg-names = "mipi_lvds_phy", "mipi_lvds_ctl";
+               clocks = <&dummy>, <&dummy>;
+               clock-names = "pclk_lvds", "pclk_lvds_ctl";
+               status = "disabled";
+       };
+
+       lcdc: lcdc@ff930000 {
+               compatible = "rockchip,rk3368-lcdc";
+               rockchip,prop = <PRMRY>;
+               rockchip,pwr18 = <0>;
+               rockchip,iommu-enabled = <0>;
+               reg = <0x0 0xff930000 0x0 0x10000>;
+               interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+               pinctrl-names = "default", "gpio";
+               pinctrl-0 = <&lcdc_lcdc>;
+               pinctrl-1 = <&lcdc_gpio>;
+               status = "disabled";
+               clocks = <&dummy>, <&dummy>, <&dummy>, <&dummy>, <&dummy>;
+               clock-names = "aclk_lcdc", "dclk_lcdc", "hclk_lcdc", "pd_lcdc", "sclk_pll";
+       };
 };