ARM: v7 setup function should invalidate L1 cache

[firefly-linux-kernel-4.4.55.git] / arch / arm / mach-socfpga / headsmp.S

diff --git a/arch/arm/mach-socfpga/headsmp.S b/arch/arm/mach-socfpga/headsmp.S
index f65ea0af4af37dbdce42f9bf1af740b4feeb9e22..5bb0164271076eb4b4d0393d0af271493464df88 100644 (file)
--- a/arch/arm/mach-socfpga/headsmp.S
+++ b/arch/arm/mach-socfpga/headsmp.S
@@ -30,8 +30,3 @@ ENTRY(secondary_trampoline)
 1:     .long   .
        .long   socfpga_cpu1start_addr
 ENTRY(secondary_trampoline_end)
-
-ENTRY(socfpga_secondary_startup)
-       bl      v7_invalidate_l1
-       b       secondary_startup
-ENDPROC(socfpga_secondary_startup)