#include <linux/of_platform.h>
#include <linux/rockchip/common.h>
#include <linux/rockchip/cpu.h>
+#include <linux/rockchip/cpu_axi.h>
#include <linux/rockchip/cru.h>
#include <linux/rockchip/dvfs.h>
#include <linux/rockchip/grf.h>
#include <asm/cputype.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
-#include "cpu_axi.h"
#include "loader.h"
#include "rk3126b.h"
#define CPU 312x
#include "sram.h"
#include "pm.h"
#include "pm-rk312x.c"
+#include <linux/rockchip/cpu.h>
#define RK312X_DEVICE(name) \
{ \
.virtual = (unsigned long) RK_##name##_VIRT, \
rk312x_pmu_set_idle_request(IDLE_REQ_GPU, true);
} else if (pd == PD_VIO) {
SAVE_QOS(rga_qos, VIO_RGA);
- SAVE_QOS(ebc_qos, VIO_EBC);
+ if (!soc_is_rk3126b())
+ SAVE_QOS(ebc_qos, VIO_EBC);
SAVE_QOS(iep_qos, VIO_IEP);
SAVE_QOS(lcdc0_qos, VIO_LCDC0);
SAVE_QOS(vip0_qos, VIO_VIP0);
} else if (pd == PD_VIO) {
rk312x_pmu_set_idle_request(IDLE_REQ_VIO, false);
RESTORE_QOS(rga_qos, VIO_RGA);
- RESTORE_QOS(ebc_qos, VIO_EBC);
+ if (!soc_is_rk3126b())
+ RESTORE_QOS(ebc_qos, VIO_EBC);
RESTORE_QOS(iep_qos, VIO_IEP);
RESTORE_QOS(lcdc0_qos, VIO_LCDC0);
RESTORE_QOS(vip0_qos, VIO_VIP0);
static void __init rk312x_reserve(void)
{
+ /* reserve memory for uboot */
+ rockchip_uboot_mem_reserve();
+
/* reserve memory for ION */
rockchip_ion_reserve();
}
ddr_round_rate = _ddr_round_rate;
ddr_set_auto_self_refresh = _ddr_set_auto_self_refresh;
ddr_bandwidth_get = _ddr_bandwidth_get;
- ddr_init(DDR3_DEFAULT, 300);
- }
+ ddr_init(DDR3_DEFAULT, 0);
+ }
+
return 0;
}
arch_initcall_sync(rk312x_ddr_init);