ARM: rockchip: pm: fix compilation warning

[firefly-linux-kernel-4.4.55.git] / arch / arm / mach-rockchip / pm.h

diff --git a/arch/arm/mach-rockchip/pm.h b/arch/arm/mach-rockchip/pm.h
index 811526a227cf9648d2535cee27af249e42ff9631..7833519562ac099396a54d74a9d675ebc55a421d 100755 (executable)
--- a/arch/arm/mach-rockchip/pm.h
+++ b/arch/arm/mach-rockchip/pm.h
@@ -4,22 +4,41 @@
 
 
 /******************************sleep data in bootram********************************/
-#define PM_BOOT_CODE_OFFSET (0x0)
-#define PM_BOOT_CODE_SIZE      (0x100)
+
+#define RKPM_ALIGN(size,n_byte) (((size+n_byte-1)/n_byte)*n_byte)
 
 // index data off in SLP_DATA_SAVE_BASE
 // it may be include in *.s ,so con't use enum type define
 
-#define SLPDATA_L2_CON                       (0)  //cpu resume sp
-#define SLPDATA_SP_ADDR                       (SLPDATA_L2_CON+1)  //cpu resume sp
-#define SLPDATA_SP_CPU_RESUME          (SLPDATA_SP_ADDR+1)  //cpu resume sp
-#define SLPDATA_DDR_NEED_RES            (SLPDATA_SP_CPU_RESUME+1)  //ddr ctrl is need to resume
-#define SLPDATA_DPLL_NEED_RES           (SLPDATA_DDR_NEED_RES+1) //ddr pll is need to resume
-#define SLPDATA_DDR_CODE_PHY            (SLPDATA_DPLL_NEED_RES+1) //ddr resume code phy
-#define SLPDATA_DDR_DATA_PHY            (SLPDATA_DDR_CODE_PHY+1) //ddr resume data phy
-#define SLPDATA_SLEEP_RES_CON_CNT                    (SLPDATA_DDR_DATA_PHY+1)
 
-#define PM_BOOT_DATA_SIZE   (SLPDATA_SLEEP_RES_CON_CNT*4) // all index
+
+#define RKPM_BOOTDATA_CPUSP            (0)  //cpu sp addr
+#define RKPM_BOOTDATA_CPUCODE       (RKPM_BOOTDATA_CPUSP+1)  //cpu resume fun,phy base
+#define RKPM_BOOTDATA_DDR_F            (RKPM_BOOTDATA_CPUCODE+1)  //ddr flag , 1 need to resume ddr ctr
+#define RKPM_BOOTDATA_DPLL_F          (RKPM_BOOTDATA_DDR_F+1) //ddr pll flag, 1  need to resume dpll
+#define RKPM_BOOTDATA_DDRCODE       (RKPM_BOOTDATA_DPLL_F+1) //ddr resume code ,phy base
+#define RKPM_BOOTDATA_DDRDATA       (RKPM_BOOTDATA_DDRCODE+1) //ddr resume data ,phy base
+// for l2 resume
+#define RKPM_BOOTDATA_L2LTY_F             (RKPM_BOOTDATA_DDRDATA+1)  //save l2 latency val
+#define RKPM_BOOTDATA_L2LTY             (RKPM_BOOTDATA_L2LTY_F+1)
+// for arm errata 81835 resume
+#define RKPM_BOOTDATA_ARM_ERRATA_818325_F            (RKPM_BOOTDATA_L2LTY+1)  //save l2 latency val
+#define RKPM_BOOTDATA_ARM_ERRATA_818325             (RKPM_BOOTDATA_ARM_ERRATA_818325_F+1)
+
+#define RKPM_BOOTDATA_ARR_SIZE  (RKPM_BOOTDATA_ARM_ERRATA_818325+1)
+
+
+
+#define RKPM_BOOT_CODE_OFFSET (0x0)
+#define RKPM_BOOT_CODE_SIZE    (0x100)
+
+#define RKPM_BOOT_DATA_OFFSET (RKPM_BOOT_CODE_OFFSET+RKPM_BOOT_CODE_SIZE)
+#define RKPM_BOOT_DATA_SIZE    (RKPM_BOOTDATA_ARR_SIZE*4)
+
+#define RKPM_BOOT_DDRCODE_OFFSET (RKPM_BOOT_DATA_OFFSET+RKPM_BOOT_DATA_SIZE)
+
+
+
 
 
 #define RKPM_CTRBITS_SOC_DLPMD RKPM_OR_5BITS(ARMDP_LPMD ,ARMOFF_LPMD ,ARMLOGDP_LPMD ,ARMOFF_LOGDP_LPMD,ARMLOGOFF_DLPMD)
@@ -62,11 +81,14 @@ struct rkpm_ops {
        
        rkpm_ops_void_callback  gpios;
        rkpm_ops_void_callback  re_gpios;
+    
+        rkpm_ops_paramter_u32_cb save_setting;  //idle \ sleep mode save and setting
+       rkpm_ops_void_callback re_save_setting;
 
-        rkpm_ops_void_callback  slp_save;       
-        rkpm_ops_paramter_u32_cb  slp_setting;
+       
+        rkpm_ops_void_callback  slp_setting;
         rkpm_ops_void_callback  slp_re_first;
-        rkpm_ops_void_callback  slp_re_last;
+        //rkpm_ops_void_callback  slp_re_last;
     
         rkpm_ops_printch_callback printch;
 
@@ -104,7 +126,7 @@ struct rkpm_gpios_info_st{
 
 /******************ctr bits setting  ************************/
 
-#define rkpm_chk_val_ctrbit(val,bit) ((val)&(bit))//check bit
+//#define rkpm_chk_val_ctrbit(val,bit) ((val)&(bit))//check bit
 #define rkpm_chk_val_ctrbits(val,bits) ((val)&(bits))  //check bits
 
 /************************************reg ops*****************************************************/
@@ -148,8 +170,8 @@ extern void rkpm_set_ops_plls(rkpm_ops_void_callback plls,rkpm_ops_void_callback
 extern void rkpm_set_ops_gpios(rkpm_ops_void_callback gpios,rkpm_ops_void_callback re_gpios);
 extern void rkpm_set_ops_printch(rkpm_ops_printch_callback printch);
 extern void rkpm_set_ops_regs_pread(rkpm_ops_void_callback regs_pread);
-extern void rkpm_set_ops_regs_sleep(rkpm_ops_void_callback save,rkpm_ops_paramter_u32_cb setting
-                                                                ,rkpm_ops_void_callback re_first,rkpm_ops_void_callback re_last);
+extern void rkpm_set_ops_save_setting(rkpm_ops_paramter_u32_cb save_setting,rkpm_ops_void_callback re_save_setting);
+extern void rkpm_set_ops_regs_sleep(rkpm_ops_void_callback slp_setting,rkpm_ops_void_callback re_last);
 
 extern void rkpm_set_sram_ops_volt(rkpm_ops_void_callback volts,rkpm_ops_void_callback re_volts);
 extern void rkpm_set_sram_ops_gtclks(rkpm_ops_void_callback gtclks,rkpm_ops_void_callback re_gtclks);
@@ -158,11 +180,9 @@ extern void rkpm_set_sram_ops_pmic(rkpm_ops_void_callback pmic,rkpm_ops_void_cal
 extern void rkpm_set_sram_ops_ddr(rkpm_ops_void_callback ddr,rkpm_ops_void_callback re_ddr);
 extern void rkpm_set_sram_ops_printch(rkpm_ops_printch_callback printch);
 
-extern void inline rkpm_set_ctrbits(u32 bits);
-extern u32  inline rkpm_get_ctrbits(void);
-extern void inline  rkpm_set_ctrbit(int idxs);
-extern u32 inline  rkpm_get_ctrbit(int idxs);
-extern void inline rkpm_clr_ctrbit(int idxs);//clear
+extern void rkpm_set_ctrbits(u32 bits);
+extern u32  rkpm_get_ctrbits(void);
+extern void rkpm_clr_ctrbits(u32 bits);//clear
 
 extern void rkpm_ddr_printch(char byte);
 extern void rkpm_ddr_printascii(const char *s);