void __init rk30_map_io(void)
{
rk30_map_common_io();
+#ifdef DEBUG_UART_BASE
+#ifdef CONFIG_RK_USB_UART
+ if(!(readl_relaxed(RK30_GRF_BASE + GRF_SOC_STATUS0) & (1 << 13))){//detect id
+ writel_relaxed((0x0300 << 16), RK30_GRF_BASE + GRF_UOC0_CON0);
+ }else{
+ if(!(readl_relaxed(RK30_GRF_BASE + GRF_SOC_STATUS0) & (1 << 10))){//detect vbus
+ writel_relaxed(((0x01 << 2) | ((0x01 << 2) << 16)), RK30_GRF_BASE + GRF_UOC0_CON2); //software control usb phy enable
+ writel_relaxed((0x2A | (0x3F << 16)), RK30_GRF_BASE + GRF_UOC0_CON3); //usb phy enter suspend
+ writel_relaxed((0x0300 | (0x0300 << 16)), RK30_GRF_BASE + GRF_UOC0_CON0);
+ }else{
+ writel_relaxed((0x0300 << 16), RK30_GRF_BASE + GRF_UOC0_CON0);
+ }
+ }
+#else
+ writel_relaxed((0x0300 << 16), RK30_GRF_BASE + GRF_UOC0_CON0);
+#endif
+ writel_relaxed(0x07, DEBUG_UART_BASE + 0x88);
+ writel_relaxed(0x07, DEBUG_UART_BASE + 0x88);
+ writel_relaxed(0x00, DEBUG_UART_BASE + 0x04);
+ writel_relaxed(0x83, DEBUG_UART_BASE + 0x0c);
+ writel_relaxed(0x0d, DEBUG_UART_BASE + 0x00);
+ writel_relaxed(0x00, DEBUG_UART_BASE + 0x04);
+ writel_relaxed(0x03, DEBUG_UART_BASE + 0x0c);
+#endif
rk29_setup_early_printk();
rk30_cpu_axi_init();
rk30_io_drive_strength_init();