#include <linux/sensor-dev.h>
#include <linux/mfd/tps65910.h>
#include <linux/regulator/rk29-pwm-regulator.h>
-#if defined(CONFIG_HDMI_RK30)
+
+#if defined(CONFIG_MFD_RK610)
+#include <linux/mfd/rk610_core.h>
+#endif
+
+#if defined(CONFIG_RK_HDMI)
#include "../../../drivers/video/rockchip/hdmi/rk_hdmi.h"
#endif
#if defined(CONFIG_SPIM_RK29)
#include "../../../drivers/spi/rk29_spim.h"
#endif
+#if defined(CONFIG_GPS_RK)
+#include "../../../drivers/misc/gps/rk_gps/rk_gps.h"
+#endif
+
#if defined(CONFIG_MU509)
#include <linux/mu509.h>
#endif
return 0;
}
-#if defined(CONFIG_LCDC0_RK31)
+#if defined(CONFIG_LCDC0_RK3066B)
struct rk29fb_info lcdc0_screen_info = {
.prop = PRMRY, //primary display device
.io_init = rk_fb_io_init,
};
#endif
-#if defined(CONFIG_LCDC1_RK31)
+#if defined(CONFIG_LCDC1_RK3066B)
struct rk29fb_info lcdc1_screen_info = {
- #if defined(CONFIG_HDMI_RK30)
+ #if defined(CONFIG_RK_HDMI)
.prop = EXTEND, //extend display device
.lcd_info = NULL,
.set_screen_info = hdmi_init_lcdc,
};
#endif
-#if defined(CONFIG_LCDC0_RK31)
+#if defined(CONFIG_LCDC0_RK3066B)
static struct resource resource_lcdc0[] = {
[0] = {
.name = "lcdc0 reg",
},
};
#endif
-#if defined(CONFIG_LCDC1_RK31)
+#if defined(CONFIG_LCDC1_RK3066B)
static struct resource resource_lcdc1[] = {
[0] = {
.name = "lcdc1 reg",
};
#endif
+#if defined(CONFIG_MFD_RK610)
+#if 1
+#define RK610_RST_PIN_MUX_NAME GPIO2C5_LCDC1DATA21_SMCADDR5_NAME
+#define RK610_RST_PIN_MUX_MODE GPIO2C_GPIO2C5
+#define RK610_RST_PIN RK30_PIN2_PC5
+#else
+#define RK610_RST_PIN_MUX_NAME GPIO2D6_SMCCSN1_NAME
+#define RK610_RST_PIN_MUX_MODE GPIO2D_GPIO2D6
+#define RK610_RST_PIN RK30_PIN2_PD6
+
+#endif
+static int rk610_power_on_init(void)
+{
+ int ret;
+ if(RK610_RST_PIN != INVALID_GPIO)
+ {
+ rk30_mux_api_set(RK610_RST_PIN_MUX_NAME,RK610_RST_PIN_MUX_MODE);
+ ret = gpio_request(RK610_RST_PIN, "rk610 reset");
+ if (ret)
+ {
+ printk(KERN_ERR "rk610_control_probe request gpio fail\n");
+ }
+ else
+ {
+ gpio_direction_output(RK610_RST_PIN, GPIO_HIGH);
+ msleep(100);
+ gpio_direction_output(RK610_RST_PIN, GPIO_LOW);
+ msleep(100);
+ gpio_set_value(RK610_RST_PIN, GPIO_HIGH);
+ }
+ }
+
+ return 0;
+
+}
+
+
+static struct rk610_ctl_platform_data rk610_ctl_pdata = {
+ .rk610_power_on_init = rk610_power_on_init,
+};
+#endif
+
#ifdef CONFIG_ANDROID_TIMED_GPIO
static struct timed_gpio timed_gpios[] = {
{
};
#endif
+#if defined(CONFIG_GPS_RK)
+int rk_gps_io_init(void)
+{
+ printk("%s \n", __FUNCTION__);
+
+ rk30_mux_api_set(GPIO1B5_UART3RTSN_NAME, GPIO1B_GPIO1B5);//VCC_EN
+ gpio_request(RK30_PIN1_PB5, NULL);
+ gpio_direction_output(RK30_PIN1_PB5, GPIO_LOW);
+
+ rk30_mux_api_set(GPIO1B4_UART3CTSN_GPSRFCLK_NAME, GPIO1B_GPSRFCLK);//GPS_CLK
+ rk30_mux_api_set(GPIO1B2_UART3SIN_GPSMAG_NAME, GPIO1B_GPSMAG);//GPS_MAG
+ rk30_mux_api_set(GPIO1B3_UART3SOUT_GPSSIG_NAME, GPIO1B_GPSSIG);//GPS_SIGN
+
+ rk30_mux_api_set(GPIO1A6_UART1CTSN_SPI0CLK_NAME, GPIO1A_GPIO1A6);//SPI_CLK
+ gpio_request(RK30_PIN1_PA6, NULL);
+ gpio_direction_output(RK30_PIN1_PA6, GPIO_LOW);
+
+ rk30_mux_api_set(GPIO1A5_UART1SOUT_SPI0TXD_NAME, GPIO1A_GPIO1A5);//SPI_MOSI
+ gpio_request(RK30_PIN1_PA5, NULL);
+ gpio_direction_output(RK30_PIN1_PA5, GPIO_LOW);
+
+ rk30_mux_api_set(GPIO1A7_UART1RTSN_SPI0CSN0_NAME, GPIO1A_GPIO1A7);//SPI_CS
+ gpio_request(RK30_PIN1_PA7, NULL);
+ gpio_direction_output(RK30_PIN1_PA7, GPIO_LOW);
+ return 0;
+}
+int rk_gps_power_up(void)
+{
+ printk("%s \n", __FUNCTION__);
+
+ return 0;
+}
+
+int rk_gps_power_down(void)
+{
+ printk("%s \n", __FUNCTION__);
+
+ return 0;
+}
+
+int rk_gps_reset_set(int level)
+{
+ return 0;
+}
+int rk_enable_hclk_gps(void)
+{
+ printk("%s \n", __FUNCTION__);
+ clk_enable(clk_get(NULL, "hclk_gps"));
+ return 0;
+}
+int rk_disable_hclk_gps(void)
+{
+ printk("%s \n", __FUNCTION__);
+ clk_disable(clk_get(NULL, "hclk_gps"));
+ return 0;
+}
+struct rk_gps_data rk_gps_info = {
+ .io_init = rk_gps_io_init,
+ .power_up = rk_gps_power_up,
+ .power_down = rk_gps_power_down,
+ .reset = rk_gps_reset_set,
+ .enable_hclk_gps = rk_enable_hclk_gps,
+ .disable_hclk_gps = rk_disable_hclk_gps,
+ .GpsSign = RK30_PIN1_PB3,
+ .GpsMag = RK30_PIN1_PB2, //GPIO index
+ .GpsClk = RK30_PIN1_PB4, //GPIO index
+ .GpsVCCEn = RK30_PIN1_PB5, //GPIO index
+ .GpsSpi_CSO = RK30_PIN1_PA4, //GPIO index
+ .GpsSpiClk = RK30_PIN1_PA5, //GPIO index
+ .GpsSpiMOSI = RK30_PIN1_PA7, //GPIO index
+ .GpsIrq = IRQ_GPS,
+ .GpsSpiEn = 0,
+ .GpsAdcCh = 2,
+ .u32GpsPhyAddr = RK30_GPS_PHYS,
+ .u32GpsPhySize = RK30_GPS_SIZE,
+};
+
+struct platform_device rk_device_gps = {
+ .name = "gps_hv5820b",
+ .id = -1,
+ .dev = {
+ .platform_data = &rk_gps_info,
+ }
+ };
+#endif
+
+
static struct platform_device *devices[] __initdata = {
#ifdef CONFIG_FB_ROCKCHIP
&device_fb,
#endif
-#if defined(CONFIG_LCDC0_RK31)
+#if defined(CONFIG_LCDC0_RK3066B)
&device_lcdc0,
#endif
-#if defined(CONFIG_LCDC1_RK31)
+#if defined(CONFIG_LCDC1_RK3066B)
&device_lcdc1,
#endif
-
+
#ifdef CONFIG_BACKLIGHT_RK29_BL
&rk29_device_backlight,
#endif
#ifdef CONFIG_RFKILL_RK
&device_rfkill_rk,
#endif
+#ifdef CONFIG_GPS_RK
+ &rk_device_gps,
+#endif
+
};
// i2c
.type = "rk610_ctl",
.addr = 0x40,
.flags = 0,
+ .platform_data = &rk610_ctl_pdata,
},
#ifdef CONFIG_RK610_TVOUT
{
.flags = 0,
},
#endif
-#ifdef CONFIG_RK610_HDMI
+#ifdef CONFIG_HDMI_RK610
{
.type = "rk610_hdmi",
.addr = 0x46,
.flags = 0,
- .irq = RK29_PIN5_PA2,
+ .irq = INVALID_GPIO,
},
#endif
#ifdef CONFIG_SND_SOC_RK610
};
#endif
-#define PMIC_TYPE_WM8326 1
-#define PMIC_TYPE_TPS65910 2
int __sramdata g_pmic_type = 0;
#ifdef CONFIG_I2C1_RK30
#ifdef CONFIG_MFD_WM831X_I2C
void __sramfunc board_pmu_suspend(void)
{
#if defined (CONFIG_MFD_WM831X_I2C)
- if(g_pmic_type == PMIC_TYPE_WM8326)
+ if(pmic_is_wm8326())
board_pmu_wm8326_suspend();
#endif
#if defined (CONFIG_MFD_TPS65910)
- if(g_pmic_type == PMIC_TYPE_TPS65910)
+ if(pmic_is_tps65910())
board_pmu_tps65910_suspend();
#endif
}
void __sramfunc board_pmu_resume(void)
{
#if defined (CONFIG_MFD_WM831X_I2C)
- if(g_pmic_type == PMIC_TYPE_WM8326)
+ if(pmic_is_wm8326())
board_pmu_wm8326_resume();
#endif
#if defined (CONFIG_MFD_TPS65910)
- if(g_pmic_type == PMIC_TYPE_TPS65910)
+ if(pmic_is_tps65910())
board_pmu_tps65910_resume();
#endif
}
#ifdef CONFIG_VIDEO_RK29
rk30_camera_request_reserve_mem();
#endif
+
+#ifdef CONFIG_GPS_RK
+ //it must be more than 8MB
+ rk_gps_info.u32MemoryPhyAddr = board_mem_reserve_add("gps", SZ_8M);
+#endif
board_mem_reserved();
}
* comments : min arm/logic voltage
*/
static struct dvfs_arm_table dvfs_cpu_logic_table[] = {
-#if 0
- {.frequency = 252 * 1000, .cpu_volt = 1075 * 1000, .logic_volt = 1125 * 1000},//0.975V/1.000V
-#endif
- {.frequency = 504 * 1000, .cpu_volt = 975 * 1000, .logic_volt = 1000 * 1000},//0.975V/1.000V
- {.frequency = 816 * 1000, .cpu_volt = 1000 * 1000, .logic_volt = 1000 * 1000},//1.000V/1.025V
- {.frequency = 1200 * 1000, .cpu_volt = 1025 * 1000, .logic_volt = 1000 * 1000},//1.100V/1.050V
-#if 0
- {.frequency = 1008 * 1000, .cpu_volt = 1125 * 1000, .logic_volt = 1150 * 1000},//1.025V/1.050V
- {.frequency = 1272 * 1000, .cpu_volt = 1225 * 1000, .logic_volt = 1200 * 1000},//1.150V/1.100V
- {.frequency = 1416 * 1000, .cpu_volt = 1300 * 1000, .logic_volt = 1200 * 1000},//1.225V/1.100V
- {.frequency = 1512 * 1000, .cpu_volt = 1350 * 1000, .logic_volt = 1250 * 1000},//1.300V/1.150V
- {.frequency = 1608 * 1000, .cpu_volt = 1425 * 1000, .logic_volt = 1300 * 1000},//1.325V/1.175V
-#endif
+ {.frequency = 312 * 1000, .cpu_volt = 750 * 1000, .logic_volt = 900 * 1000},
+ {.frequency = 504 * 1000, .cpu_volt = 800 * 1000, .logic_volt = 900 * 1000},
+ {.frequency = 816 * 1000, .cpu_volt = 850 * 1000, .logic_volt = 900 * 1000},
+ {.frequency = 1008 * 1000, .cpu_volt = 925 * 1000, .logic_volt = 900 * 1000},
+ {.frequency = 1200 * 1000, .cpu_volt = 1000 * 1000, .logic_volt = 950 * 1000},
+ {.frequency = 1416 * 1000, .cpu_volt = 1100 * 1000, .logic_volt = 1050 * 1000},
+ {.frequency = 1608 * 1000, .cpu_volt = 1200 * 1000, .logic_volt = 1150 * 1000},
{.frequency = CPUFREQ_TABLE_END},
};
static struct cpufreq_frequency_table dvfs_gpu_table[] = {
- {.frequency = 266 * 1000, .index = 1000 * 1000},
- {.frequency = 400 * 1000, .index = 1000 * 1000},
+ {.frequency = 100 * 1000, .index = 900 * 1000},
+ {.frequency = 200 * 1000, .index = 900 * 1000},
+ {.frequency = 266 * 1000, .index = 900 * 1000},
+ {.frequency = 300 * 1000, .index = 900 * 1000},
+ {.frequency = 400 * 1000, .index = 950 * 1000},
+ {.frequency = 600 * 1000, .index = 1100 * 1000},
{.frequency = CPUFREQ_TABLE_END},
};
static struct cpufreq_frequency_table dvfs_ddr_table[] = {
- {.frequency = 300 * 1000, .index = 1000 * 1000},
- {.frequency = 400 * 1000, .index = 1000 * 1000},
+ {.frequency = 300 * 1000, .index = 900 * 1000},
+ {.frequency = 400 * 1000, .index = 950 * 1000},
{.frequency = CPUFREQ_TABLE_END},
};
-
#define DVFS_CPU_TABLE_SIZE (ARRAY_SIZE(dvfs_cpu_logic_table))
static struct cpufreq_frequency_table cpu_dvfs_table[DVFS_CPU_TABLE_SIZE];
static struct cpufreq_frequency_table dep_cpu2core_table[DVFS_CPU_TABLE_SIZE];
projects / firefly-linux-kernel-4.4.55.git / blobdiff