Merge tag 'omap-for-v4.1/prcm-dts-mfd-syscon-fix' of git://git.kernel.org/pub/scm...

[firefly-linux-kernel-4.4.55.git] / arch / arm / mach-omap2 / Kconfig

diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 02f5f3faac1fba6e7fdf8dd446b35225344dfe09..f92f389890bd3c8d56515c55bcf34ed7c0038617 100644 (file)
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -69,6 +69,7 @@ config SOC_DRA7XX
        select ARM_GIC
        select HAVE_ARM_ARCH_TIMER
        select IRQ_CROSSBAR
+       select ARM_ERRATA_798181 if SMP
 
 config ARCH_OMAP2PLUS
        bool
@@ -279,27 +280,6 @@ config OMAP3_SDRC_AC_TIMING
          wish to say no.  Selecting yes without understanding what is
          going on could result in system crashes;
 
-config OMAP4_ERRATA_I688
-       bool "OMAP4 errata: Async Bridge Corruption"
-       depends on (ARCH_OMAP4 || SOC_OMAP5) && !ARCH_MULTIPLATFORM
-       select ARCH_HAS_BARRIERS
-       help
-         If a data is stalled inside asynchronous bridge because of back
-         pressure, it may be accepted multiple times, creating pointer
-         misalignment that will corrupt next transfers on that data path
-         until next reset of the system (No recovery procedure once the
-         issue is hit, the path remains consistently broken). Async bridge
-         can be found on path between MPU to EMIF and MPU to L3 interconnect.
-         This situation can happen only when the idle is initiated by a
-         Master Request Disconnection (which is trigged by software when
-         executing WFI on CPU).
-         The work-around for this errata needs all the initiators connected
-         through async bridge must ensure that data path is properly drained
-         before issuing WFI. This condition will be met if one Strongly ordered
-         access is performed to the target right before executing the WFI.
-         In MPU case, L3 T2ASYNC FIFO and DDR T2ASYNC FIFO needs to be drained.
-         IO barrier ensure that there is no synchronisation loss on initiators
-         operating on both interconnect port simultaneously.
 endmenu
 
 endif