ARM: mvebu: fix indentation of assembly instructions in coherency_ll.S

[firefly-linux-kernel-4.4.55.git] / arch / arm / mach-mvebu / coherency_ll.S

diff --git a/arch/arm/mach-mvebu/coherency_ll.S b/arch/arm/mach-mvebu/coherency_ll.S
index a5e62c62819ad787cff38949f1604767f9a598da..7d1b5a51b6565a0ebd02ee0601bcd6a212ef6af3 100644 (file)
--- a/arch/arm/mach-mvebu/coherency_ll.S
+++ b/arch/arm/mach-mvebu/coherency_ll.S
@@ -66,10 +66,10 @@ ENTRY(ll_add_cpu_to_smp_group)
         * ll_get_cpuid, we can use it to save lr modifing it with the
         * following bl
         */
-       mov r0, lr
+       mov     r0, lr
        bl      ll_get_coherency_base
        bl      ll_get_cpuid
-       mov lr, r0
+       mov     lr, r0
        add     r0, r1, #ARMADA_XP_CFB_CFG_REG_OFFSET
 1:
        ldrex   r2, [r0]
@@ -108,10 +108,10 @@ ENTRY(ll_disable_coherency)
         * ll_get_cpuid, we can use it to save lr modifing it with the
         * following bl
         */
-       mov r0, lr
+       mov     r0, lr
        bl      ll_get_coherency_base
        bl      ll_get_cpuid
-       mov lr, r0
+       mov     lr, r0
        add     r0, r1, #ARMADA_XP_CFB_CTL_REG_OFFSET
 1:
        ldrex   r2, [r0]