msm: gpiomux: Move public API to public header

[firefly-linux-kernel-4.4.55.git] / arch / arm / mach-msm / gpio.c

diff --git a/arch/arm/mach-msm/gpio.c b/arch/arm/mach-msm/gpio.c
index 5ea273b00da8e4e1fe4273867bf037ecd12cc57f..6767deb79cd01b9958cd02da911ff77fe371ee86 100644 (file)
--- a/arch/arm/mach-msm/gpio.c
+++ b/arch/arm/mach-msm/gpio.c
@@ -20,22 +20,23 @@
 #include <linux/io.h>
 #include <linux/irq.h>
 #include <linux/module.h>
+#include <mach/cpu.h>
+#include <mach/msm_gpiomux.h>
 #include "gpio_hw.h"
-#include "gpiomux.h"
 
 #define FIRST_GPIO_IRQ MSM_GPIO_TO_INT(0)
 
-#define MSM_GPIO_BANK(bank, first, last)                               \
+#define MSM_GPIO_BANK(soc, bank, first, last)                          \
        {                                                               \
                .regs = {                                               \
-                       .out =         MSM_GPIO_OUT_##bank,             \
-                       .in =          MSM_GPIO_IN_##bank,              \
-                       .int_status =  MSM_GPIO_INT_STATUS_##bank,      \
-                       .int_clear =   MSM_GPIO_INT_CLEAR_##bank,       \
-                       .int_en =      MSM_GPIO_INT_EN_##bank,          \
-                       .int_edge =    MSM_GPIO_INT_EDGE_##bank,        \
-                       .int_pos =     MSM_GPIO_INT_POS_##bank,         \
-                       .oe =          MSM_GPIO_OE_##bank,              \
+                       .out =         soc##_GPIO_OUT_##bank,           \
+                       .in =          soc##_GPIO_IN_##bank,            \
+                       .int_status =  soc##_GPIO_INT_STATUS_##bank,    \
+                       .int_clear =   soc##_GPIO_INT_CLEAR_##bank,     \
+                       .int_en =      soc##_GPIO_INT_EN_##bank,        \
+                       .int_edge =    soc##_GPIO_INT_EDGE_##bank,      \
+                       .int_pos =     soc##_GPIO_INT_POS_##bank,       \
+                       .oe =          soc##_GPIO_OE_##bank,            \
                },                                                      \
                .chip = {                                               \
                        .base = (first),                                \
@@ -189,40 +190,38 @@ static void msm_gpio_free(struct gpio_chip *chip, unsigned offset)
 #define msm_gpio_free NULL
 #endif
 
-struct msm_gpio_chip msm_gpio_chips[] = {
-#if defined(CONFIG_ARCH_MSM7X00A)
-       MSM_GPIO_BANK(0,   0,  15),
-       MSM_GPIO_BANK(1,  16,  42),
-       MSM_GPIO_BANK(2,  43,  67),
-       MSM_GPIO_BANK(3,  68,  94),
-       MSM_GPIO_BANK(4,  95, 106),
-       MSM_GPIO_BANK(5, 107, 121),
-#elif defined(CONFIG_ARCH_MSM7X25) || defined(CONFIG_ARCH_MSM7X27)
-       MSM_GPIO_BANK(0,   0,  15),
-       MSM_GPIO_BANK(1,  16,  42),
-       MSM_GPIO_BANK(2,  43,  67),
-       MSM_GPIO_BANK(3,  68,  94),
-       MSM_GPIO_BANK(4,  95, 106),
-       MSM_GPIO_BANK(5, 107, 132),
-#elif defined(CONFIG_ARCH_MSM7X30)
-       MSM_GPIO_BANK(0,   0,  15),
-       MSM_GPIO_BANK(1,  16,  43),
-       MSM_GPIO_BANK(2,  44,  67),
-       MSM_GPIO_BANK(3,  68,  94),
-       MSM_GPIO_BANK(4,  95, 106),
-       MSM_GPIO_BANK(5, 107, 133),
-       MSM_GPIO_BANK(6, 134, 150),
-       MSM_GPIO_BANK(7, 151, 181),
-#elif defined(CONFIG_ARCH_QSD8X50)
-       MSM_GPIO_BANK(0,   0,  15),
-       MSM_GPIO_BANK(1,  16,  42),
-       MSM_GPIO_BANK(2,  43,  67),
-       MSM_GPIO_BANK(3,  68,  94),
-       MSM_GPIO_BANK(4,  95, 103),
-       MSM_GPIO_BANK(5, 104, 121),
-       MSM_GPIO_BANK(6, 122, 152),
-       MSM_GPIO_BANK(7, 153, 164),
-#endif
+static struct msm_gpio_chip *msm_gpio_chips;
+static int msm_gpio_count;
+
+static struct msm_gpio_chip msm_gpio_chips_msm7x01[] = {
+       MSM_GPIO_BANK(MSM7X00, 0,   0,  15),
+       MSM_GPIO_BANK(MSM7X00, 1,  16,  42),
+       MSM_GPIO_BANK(MSM7X00, 2,  43,  67),
+       MSM_GPIO_BANK(MSM7X00, 3,  68,  94),
+       MSM_GPIO_BANK(MSM7X00, 4,  95, 106),
+       MSM_GPIO_BANK(MSM7X00, 5, 107, 121),
+};
+
+static struct msm_gpio_chip msm_gpio_chips_msm7x30[] = {
+       MSM_GPIO_BANK(MSM7X30, 0,   0,  15),
+       MSM_GPIO_BANK(MSM7X30, 1,  16,  43),
+       MSM_GPIO_BANK(MSM7X30, 2,  44,  67),
+       MSM_GPIO_BANK(MSM7X30, 3,  68,  94),
+       MSM_GPIO_BANK(MSM7X30, 4,  95, 106),
+       MSM_GPIO_BANK(MSM7X30, 5, 107, 133),
+       MSM_GPIO_BANK(MSM7X30, 6, 134, 150),
+       MSM_GPIO_BANK(MSM7X30, 7, 151, 181),
+};
+
+static struct msm_gpio_chip msm_gpio_chips_qsd8x50[] = {
+       MSM_GPIO_BANK(QSD8X50, 0,   0,  15),
+       MSM_GPIO_BANK(QSD8X50, 1,  16,  42),
+       MSM_GPIO_BANK(QSD8X50, 2,  43,  67),
+       MSM_GPIO_BANK(QSD8X50, 3,  68,  94),
+       MSM_GPIO_BANK(QSD8X50, 4,  95, 103),
+       MSM_GPIO_BANK(QSD8X50, 5, 104, 121),
+       MSM_GPIO_BANK(QSD8X50, 6, 122, 152),
+       MSM_GPIO_BANK(QSD8X50, 7, 153, 164),
 };
 
 static void msm_gpio_irq_ack(struct irq_data *d)
@@ -318,7 +317,7 @@ static void msm_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
        int i, j, mask;
        unsigned val;
 
-       for (i = 0; i < ARRAY_SIZE(msm_gpio_chips); i++) {
+       for (i = 0; i < msm_gpio_count; i++) {
                struct msm_gpio_chip *msm_chip = &msm_gpio_chips[i];
                val = readl(msm_chip->regs.int_status);
                val &= msm_chip->int_enable[0];
@@ -349,6 +348,19 @@ static int __init msm_init_gpio(void)
 {
        int i, j = 0;
 
+       if (cpu_is_msm7x01()) {
+               msm_gpio_chips = msm_gpio_chips_msm7x01;
+               msm_gpio_count = ARRAY_SIZE(msm_gpio_chips_msm7x01);
+       } else if (cpu_is_msm7x30()) {
+               msm_gpio_chips = msm_gpio_chips_msm7x30;
+               msm_gpio_count = ARRAY_SIZE(msm_gpio_chips_msm7x30);
+       } else if (cpu_is_qsd8x50()) {
+               msm_gpio_chips = msm_gpio_chips_qsd8x50;
+               msm_gpio_count = ARRAY_SIZE(msm_gpio_chips_qsd8x50);
+       } else {
+               return 0;
+       }
+
        for (i = FIRST_GPIO_IRQ; i < FIRST_GPIO_IRQ + NR_GPIO_IRQS; i++) {
                if (i - FIRST_GPIO_IRQ >=
                        msm_gpio_chips[j].chip.base +
@@ -360,7 +372,7 @@ static int __init msm_init_gpio(void)
                set_irq_flags(i, IRQF_VALID);
        }
 
-       for (i = 0; i < ARRAY_SIZE(msm_gpio_chips); i++) {
+       for (i = 0; i < msm_gpio_count; i++) {
                spin_lock_init(&msm_gpio_chips[i].lock);
                writel(0, msm_gpio_chips[i].regs.int_en);
                gpiochip_add(&msm_gpio_chips[i].chip);