Merge tag 'tiny/kconfig-for-3.17' of https://git.kernel.org/pub/scm/linux/kernel...

[firefly-linux-kernel-4.4.55.git] / arch / arm / mach-imx / clk-pllv3.c

diff --git a/arch/arm/mach-imx/clk-pllv3.c b/arch/arm/mach-imx/clk-pllv3.c
index f6640b6a7b3128a7ca6a6d8d31578419ea1be431..61364050fccdce42b477f2a7a4aaafddf136f41a 100644 (file)
--- a/arch/arm/mach-imx/clk-pllv3.c
+++ b/arch/arm/mach-imx/clk-pllv3.c
@@ -12,6 +12,7 @@
 
 #include <linux/clk.h>
 #include <linux/clk-provider.h>
+#include <linux/delay.h>
 #include <linux/io.h>
 #include <linux/slab.h>
 #include <linux/jiffies.h>
@@ -45,33 +46,49 @@ struct clk_pllv3 {
 
 #define to_clk_pllv3(_hw) container_of(_hw, struct clk_pllv3, hw)
 
+static int clk_pllv3_wait_lock(struct clk_pllv3 *pll)
+{
+       unsigned long timeout = jiffies + msecs_to_jiffies(10);
+       u32 val = readl_relaxed(pll->base) & BM_PLL_POWER;
+
+       /* No need to wait for lock when pll is not powered up */
+       if ((pll->powerup_set && !val) || (!pll->powerup_set && val))
+               return 0;
+
+       /* Wait for PLL to lock */
+       do {
+               if (readl_relaxed(pll->base) & BM_PLL_LOCK)
+                       break;
+               if (time_after(jiffies, timeout))
+                       break;
+               usleep_range(50, 500);
+       } while (1);
+
+       return readl_relaxed(pll->base) & BM_PLL_LOCK ? 0 : -ETIMEDOUT;
+}
+
 static int clk_pllv3_prepare(struct clk_hw *hw)
 {
        struct clk_pllv3 *pll = to_clk_pllv3(hw);
-       unsigned long timeout;
        u32 val;
+       int ret;
 
        val = readl_relaxed(pll->base);
-       val &= ~BM_PLL_BYPASS;
        if (pll->powerup_set)
                val |= BM_PLL_POWER;
        else
                val &= ~BM_PLL_POWER;
        writel_relaxed(val, pll->base);
 
-       timeout = jiffies + msecs_to_jiffies(10);
-       /* Wait for PLL to lock */
-       do {
-               if (readl_relaxed(pll->base) & BM_PLL_LOCK)
-                       break;
-               if (time_after(jiffies, timeout))
-                       break;
-       } while (1);
+       ret = clk_pllv3_wait_lock(pll);
+       if (ret)
+               return ret;
 
-       if (readl_relaxed(pll->base) & BM_PLL_LOCK)
-               return 0;
-       else
-               return -ETIMEDOUT;
+       val = readl_relaxed(pll->base);
+       val &= ~BM_PLL_BYPASS;
+       writel_relaxed(val, pll->base);
+
+       return 0;
 }
 
 static void clk_pllv3_unprepare(struct clk_hw *hw)
@@ -146,7 +163,7 @@ static int clk_pllv3_set_rate(struct clk_hw *hw, unsigned long rate,
        val |= div;
        writel_relaxed(val, pll->base);
 
-       return 0;
+       return clk_pllv3_wait_lock(pll);
 }
 
 static const struct clk_ops clk_pllv3_ops = {
@@ -202,7 +219,7 @@ static int clk_pllv3_sys_set_rate(struct clk_hw *hw, unsigned long rate,
        val |= div;
        writel_relaxed(val, pll->base);
 
-       return 0;
+       return clk_pllv3_wait_lock(pll);
 }
 
 static const struct clk_ops clk_pllv3_sys_ops = {
@@ -276,7 +293,7 @@ static int clk_pllv3_av_set_rate(struct clk_hw *hw, unsigned long rate,
        writel_relaxed(mfn, pll->base + PLL_NUM_OFFSET);
        writel_relaxed(mfd, pll->base + PLL_DENOM_OFFSET);
 
-       return 0;
+       return clk_pllv3_wait_lock(pll);
 }
 
 static const struct clk_ops clk_pllv3_av_ops = {