Merge branch 'lsk-v4.4-eas-v5.2' of git://git.linaro.org/arm/eas/kernel.git

[firefly-linux-kernel-4.4.55.git] / arch / arm / mach-exynos / sleep.S

diff --git a/arch/arm/mach-exynos/sleep.S b/arch/arm/mach-exynos/sleep.S
index 31d25834b9c4b04d5e8a57adf39aa9083c38d027..cf950790fbdceb470643b5e8c152394deb2d46e5 100644 (file)
--- a/arch/arm/mach-exynos/sleep.S
+++ b/arch/arm/mach-exynos/sleep.S
@@ -23,14 +23,7 @@
 #define CPU_MASK       0xff0ffff0
 #define CPU_CORTEX_A9  0x410fc090
 
-       /*
-        * The following code is located into the .data section. This is to
-        * allow l2x0_regs_phys to be accessed with a relative load while we
-        * can't rely on any MMU translation. We could have put l2x0_regs_phys
-        * in the .text section as well, but some setups might insist on it to
-        * be truly read-only. (Reference from: arch/arm/kernel/sleep.S)
-        */
-       .data
+       .text
        .align
 
        /*
@@ -69,10 +62,12 @@ ENTRY(exynos_cpu_resume_ns)
        cmp     r0, r1
        bne     skip_cp15
 
-       adr     r0, cp15_save_power
+       adr     r0, _cp15_save_power
        ldr     r1, [r0]
-       adr     r0, cp15_save_diag
+       ldr     r1, [r0, r1]
+       adr     r0, _cp15_save_diag
        ldr     r2, [r0]
+       ldr     r2, [r0, r2]
        mov     r0, #SMC_CMD_C15RESUME
        dsb
        smc     #0
@@ -118,14 +113,20 @@ skip_l2x0:
 skip_cp15:
        b       cpu_resume
 ENDPROC(exynos_cpu_resume_ns)
+
+       .align
+_cp15_save_power:
+       .long   cp15_save_power - .
+_cp15_save_diag:
+       .long   cp15_save_diag - .
+#ifdef CONFIG_CACHE_L2X0
+1:     .long   l2x0_saved_regs - .
+#endif /* CONFIG_CACHE_L2X0 */
+
+       .data
        .globl cp15_save_diag
 cp15_save_diag:
        .long   0       @ cp15 diagnostic
        .globl cp15_save_power
 cp15_save_power:
        .long   0       @ cp15 power control
-
-#ifdef CONFIG_CACHE_L2X0
-       .align
-1:     .long   l2x0_saved_regs - .
-#endif /* CONFIG_CACHE_L2X0 */