Merge tag 'powerpc-3.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mpe/linux

[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / tegra124.dtsi

diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index df2b06b299851a85533243a96126e49e43813066..4be06c6ea0c8581dd71dad22af2ef45a8dc0984b 100644 (file)
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -1,8 +1,10 @@
 #include <dt-bindings/clock/tegra124-car.h>
 #include <dt-bindings/gpio/tegra-gpio.h>
+#include <dt-bindings/memory/tegra124-mc.h>
 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/thermal/tegra124-soctherm.h>
 
 #include "skeleton.dtsi"
 
@@ -102,6 +104,8 @@
                        resets = <&tegra_car 27>;
                        reset-names = "dc";
 
+                       iommus = <&mc TEGRA_SWGROUP_DC>;
+
                        nvidia,head = <0>;
                };
 
@@ -115,6 +119,8 @@
                        resets = <&tegra_car 26>;
                        reset-names = "dc";
 
+                       iommus = <&mc TEGRA_SWGROUP_DCB>;
+
                        nvidia,head = <1>;
                };
 
@@ -275,7 +281,8 @@
        pinmux: pinmux@0,70000868 {
                compatible = "nvidia,tegra124-pinmux";
                reg = <0x0 0x70000868 0x0 0x164>, /* Pad control registers */
-                     <0x0 0x70003000 0x0 0x434>; /* Mux registers */
+                     <0x0 0x70003000 0x0 0x434>, /* Mux registers */
+                     <0x0 0x70000820 0x0 0x008>; /* MIPI pad control */
        };
 
        /*
@@ -551,6 +558,17 @@
                reset-names = "fuse";
        };
 
+       mc: memory-controller@0,70019000 {
+               compatible = "nvidia,tegra124-mc";
+               reg = <0x0 0x70019000 0x0 0x1000>;
+               clocks = <&tegra_car TEGRA124_CLK_MC>;
+               clock-names = "mc";
+
+               interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
+
+               #iommu-cells = <1>;
+       };
+
        sata@0,70020000 {
                compatible = "nvidia,tegra124-ahci";
 
@@ -640,6 +658,18 @@
                status = "disabled";
        };
 
+       soctherm: thermal-sensor@0,700e2000 {
+               compatible = "nvidia,tegra124-soctherm";
+               reg = <0x0 0x700e2000 0x0 0x1000>;
+               interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&tegra_car TEGRA124_CLK_TSENSOR>,
+                       <&tegra_car TEGRA124_CLK_SOC_THERM>;
+               clock-names = "tsensor", "soctherm";
+               resets = <&tegra_car 78>;
+               reset-names = "soctherm";
+               #thermal-sensor-cells = <1>;
+       };
+
        ahub@0,70300000 {
                compatible = "nvidia,tegra124-ahub";
                reg = <0x0 0x70300000 0x0 0x200>,
@@ -881,6 +911,40 @@
                };
        };
 
+       thermal-zones {
+               cpu {
+                       polling-delay-passive = <1000>;
+                       polling-delay = <1000>;
+
+                       thermal-sensors =
+                               <&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>;
+               };
+
+               mem {
+                       polling-delay-passive = <1000>;
+                       polling-delay = <1000>;
+
+                       thermal-sensors =
+                               <&soctherm TEGRA124_SOCTHERM_SENSOR_MEM>;
+               };
+
+               gpu {
+                       polling-delay-passive = <1000>;
+                       polling-delay = <1000>;
+
+                       thermal-sensors =
+                               <&soctherm TEGRA124_SOCTHERM_SENSOR_GPU>;
+               };
+
+               pllx {
+                       polling-delay-passive = <1000>;
+                       polling-delay = <1000>;
+
+                       thermal-sensors =
+                               <&soctherm TEGRA124_SOCTHERM_SENSOR_PLLX>;
+               };
+       };
+
        timer {
                compatible = "arm,armv7-timer";
                interrupts = <GIC_PPI 13