num-cs = <2>;
clocks =<&clk_spi0>, <&clk_gates6 4>;
clock-names = "spi","pclk_spi0";
- //dmas = <&pdma1 11>, <&pdma1 12>;
- //#dma-cells = <2>;
- //dma-names = "tx", "rx";
+ dmas = <&pdma1 11>, <&pdma1 12>;
+ #dma-cells = <2>;
+ dma-names = "tx", "rx";
status = "disabled";
};
num-cs = <1>;
clocks = <&clk_spi1>, <&clk_gates6 5>;
clock-names = "spi","pclk_spi1";
- //dmas = <&pdma1 13>, <&pdma1 14>;
- //#dma-cells = <2>;
- //dma-names = "tx", "rx";
+ dmas = <&pdma1 13>, <&pdma1 14>;
+ #dma-cells = <2>;
+ dma-names = "tx", "rx";
status = "disabled";
};
num-cs = <2>;
clocks = <&clk_spi2>, <&clk_gates6 6>;
clock-names = "spi","pclk_spi2";
- //dmas = <&pdma1 15>, <&pdma1 16>;
- //#dma-cells = <2>;
- //dma-names = "tx", "rx";
+ dmas = <&pdma1 15>, <&pdma1 16>;
+ #dma-cells = <2>;
+ dma-names = "tx", "rx";
status = "disabled";
};
clocks-enable {
compatible = "rockchip,clocks-enable";
clocks =
+ /*PLL*/
+ <&clk_dpll>, <&clk_gpll>,
+
/*PD_CORE*/
<&clk_gates0 2>, <&clk_core0>,
<&clk_core1>, <&clk_core2>,
/*PD_BUS*/
<&aclk_bus>, <&clk_gates0 3>,
<&hclk_bus>, <&pclk_bus>,
- <&clk_gates13 8>, <&clk_crypto>,
+ <&clk_gates13 8>,
<&clk_gates0 7>,
/*TIMER*/
<&clk_gates10 12>,/*aclk_dma1*/
<&clk_gates10 13>,/*aclk_strc_sys*/
<&clk_gates10 4>,/*aclk_intmem*/
- <&clk_gates11 6>,/*aclk_crypto*/
- <&clk_gates11 8>,/*aclk_ccp*/
/*hclk_bus*/
- <&clk_gates11 7>,/*hclk_crypto*/
<&clk_gates10 9>,/*hclk_rom*/
/*pclk_bus*/
<&clk_gates17 2>,/*pclk_pmu_niu*/
<&clk_gates17 3>,/*pclk_sgrf*/
- /*hclk_vio*/
- <&clk_gates15 9>,/*hclk_vio_ahb_arbi*/
- <&clk_gates15 10>,/*hclk_vio_niu*/
- <&clk_gates16 10>,/*hclk_vio2_h2p*/
- <&clk_gates16 11>,/*pclk_vio2_h2p*/
-
- /*aclk_vio0*/
- <&clk_gates15 11>,/*aclk_vio0_niu*/
-
- /*aclk_vio1*/
- <&clk_gates15 12>,/*aclk_vio1_niu*/
-
- /*HDMI*/
- //<&clk_gates5 12>,/*hdmi_hdcp_clk*/
-
/*UART*/
<&clk_gates11 9>,/*pclk_uart2*/
pinctrl-0 = <&i2c1_sda &i2c1_scl>;
pinctrl-1 = <&i2c1_gpio>;
gpios = <&gpio8 GPIO_A4 GPIO_ACTIVE_LOW>, <&gpio8 GPIO_A5 GPIO_ACTIVE_LOW>;
- clocks = <&clk_gates10 3>;
+ clocks = <&clk_gates6 13>;
rockchip,check-idle = <1>;
status = "disabled";
};
pinctrl-0 = <&i2c2_sda &i2c2_scl>;
pinctrl-1 = <&i2c2_gpio>;
gpios = <&gpio6 GPIO_B1 GPIO_ACTIVE_LOW>, <&gpio6 GPIO_B2 GPIO_ACTIVE_LOW>;
- clocks = <&clk_gates6 13>;
+ clocks = <&clk_gates10 3>;
rockchip,check-idle = <1>;
status = "disabled";
};
816000 1100000
1008000 1100000
>;
+ channel = <0>;
temp-limit-enable = <1>;
target-temp = <80>;
- temp-channel = <1>;
normal-temp-limit = <
/*delta-temp delta-freq*/
3 96000
300000 1200000
400000 1200000
>;
+ channel = <2>;
status = "disabled";
};
};
300000 1200000
400000 1200000
>;
+ channel = <1>;
status = "okay";
regu-mode-table = <
/*freq mode*/
#address-cells = <1>;
#size-cells = <0>;
- ion_cma: rockchip,ion-heap@1 { /* CMA HEAP */
- compatible = "rockchip,ion-reserve";
- rockchip,ion_heap = <1>;
- reg = <0x00000000 0x20000000>; /* 512MB */
+ ion_drm: rockchip,ion-heap@5 {
+ compatible = "rockchip,ion-heap";
+ rockchip,ion_heap = <5>;
+ reg = <0x00000000 0x00000000>;
};
- rockchip,ion-heap@3 { /* VMALLOC HEAP */
- rockchip,ion_heap = <3>;
+ ion_cma: rockchip,ion-heap@4 { /* CMA HEAP */
+ compatible = "rockchip,ion-heap";
+ rockchip,ion_heap = <4>;
+ reg = <0x00000000 0x28000000>; /* 640MB */
+ };
+ rockchip,ion-heap@0 { /* VMALLOC HEAP */
+ compatible = "rockchip,ion-heap";
+ rockchip,ion_heap = <0>;
};
};
vpu: vpu_service@ff9a0000 {
compatible = "vpu_service";
- iommu_enabled = <1>;
+ iommu_enabled = <0>;
reg = <0xff9a0000 0x800>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "irq_enc", "irq_dec";
clocks = <&clk_vdpu>, <&hclk_vdpu>;
clock-names = "aclk_vcodec", "hclk_vcodec";
name = "vpu_service";
+ dev_mode = <0>;
//status = "disabled";
};
hevc: hevc_service@ff9c0000 {
compatible = "rockchip,hevc_service";
- iommu_enabled = <1>;
+ iommu_enabled = <0>;
reg = <0xff9c0000 0x800>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "irq_dec";
clocks = <&aclk_hevc>, <&hclk_hevc>, <&clk_hevc_core>, <&clk_hevc_cabac>;
clock-names = "aclk_vcodec", "hclk_vcodec", "clk_core", "clk_cabac";
+ dev_mode = <1>;
name = "hevc_service";
//status = "disabled";
};
iep: iep@ff900000 {
compatible = "rockchip,iep";
- iommu_enabled = <1>;
+ iommu_enabled = <0>;
reg = <0xff900000 0x800>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_gates15 2>, <&clk_gates15 3>;
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_gates13 5>, <&clk_gates7 6>;
clock-names = "clk_usbphy3", "hclk_usb3";
+ status = "disabled";
};
hsic: hsic@ff5c0000 {
rockchip,isp,cifphy = <1>;
rockchip,isp,mipiphy1,reg = <0xff968000 0x4000>;
rockchip,gpios = <&gpio7 GPIO_B5 GPIO_ACTIVE_HIGH>;
- rockchip,isp,iommu_enable = <0>;
+ rockchip,isp,iommu_enable = <1>;
status = "okay";
};
+ cif: cif@ff950000 {
+ compatible = "rockchip,cif";
+ reg = <0xff950000 0x10000>;
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pd_isp>,<&clk_gates15 14>,<&clk_gates15 15>,<&clkin_cif>,<&clk_gates16 0>,<&clk_cif_out>;
+ clock-names = "pd_cif0", "aclk_cif0","hclk_cif0","cif0_in","g_pclkin_cif","cif0_out";
+ pinctrl-names = "cif_pin_all";
+ pinctrl-0 = <&isp_mipi &isp_dvp_d2d9 &isp_dvp_d10d11>;
+ status = "okay";
+ };
tsadc: tsadc@ff280000 {
compatible = "rockchip,tsadc";
projects / firefly-linux-kernel-4.4.55.git / blobdiff