Revert "open display kernel log in uboot,just support lvds now"
[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / rk3288-tb.dts
index 2ea51edb8d1fa37d378bf8874a21c4027cd4e366..2f92b7ec099bd973bd90bc9c316a9f7011d0c839 100755 (executable)
@@ -12,7 +12,7 @@
         compatible = "wlan-platdata";
 
         wifi_chip_type = "";
-        sdio_vref = <28000>;
+        sdio_vref = <1800>; //1800mv or 3300mv
 
         //power_ctrl_by_pmu;
         pmu_regulator = "act_ldo3";
        
        rockchip-hdmi-spdif {
                compatible = "rockchip-hdmi-spdif";
+               dais {
+                       dai0 {
+                               audio-codec = <&codec_hdmi_spdif>;
+                               i2s-controller = <&spdif>;
+                       };
+               };
        };
 
        rockchip-rt5631 {
                                //bitclock-master;
                                //frame-master;
                        };
+                       dai1 {
+                               audio-codec = <&rt3261>;
+                               i2s-controller = <&i2s>;
+                               format = "dsp_a";
+                               //continuous-clock;
+                               bitclock-inversion;
+                               //frame-inversion;
+                               //bitclock-master;
+                               //frame-master;
+                       };
                };
        };
 
 };
 
-&emmc {
-       clock-frequency = <50000000>;
-        clock-freq-min-max = <400000 50000000>;
+&gmac {
+//     power_ctl_by = "gpio";  //"gpio" "pmu"
+       power-gpio = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>;
+//     power-pmu = "act_ldo"
+       reset-gpio = <&gpio4 GPIO_A7 GPIO_ACTIVE_LOW>;
+};
 
+&pinctrl {
+       gpio0_gpio {
+                       gpio0_c2: gpio0-c2 {
+                               rockchip,pins = <GPIO0_C2>;
+                               rockchip,pull = <VALUE_PULL_DOWN>;
+                       };
+
+                       //to add
+               };
+               
+       gpio7_gpio {
+                       gpio7_b7: gpio7-b7 {
+                               rockchip,pins = <GPIO7_B7>;
+                               rockchip,pull = <VALUE_PULL_UP>;
+                       };
+
+                       //to add
+               };
+       //could add other pinctrl definition such as gpio
+
+};
+
+&emmc {
+               clock-frequency = <200000000>;
+               clock-freq-min-max = <400000 200000000>;
         supports-highspeed;
-       supports-emmc;
-        bootpart-no-access;
-        
+               supports-emmc;
+               bootpart-no-access;
+        ignore-pm-notify;
+               keep-power-in-suspend;
        status = "okay";
 };
     
 &sdmmc {
-       clock-frequency = <50000000>;
-       lock-freq-min-max = <400000 50000000>;              
-           
-       supports-highspeed;
-       supports-sd;
-       broken-cd;
-       card-detect-delay = <200>;
-
-       
-        vmmc-supply = <&rk808_ldo5_reg>;
-       status = "okay";
+               clock-frequency = <50000000>;
+               lock-freq-min-max = <400000 50000000>;
+               supports-highspeed;
+               supports-sd;
+               broken-cd;
+               card-detect-delay = <200>;
+               vmmc-supply = <&rk808_ldo5_reg>;
+               status = "okay";
 };
                
 &sdio {
-       clock-frequency = <50000000>;
-        clock-freq-min-max = <200000 50000000>;
-               
-       supports-highspeed;             
-       supports-sdio;
-       cap-sdio-irq;
-
-       status = "diabled";
+               clock-frequency = <50000000>;
+               clock-freq-min-max = <200000 50000000>;
+               supports-highspeed;
+               supports-sdio;
+               ignore-pm-notify;
+               keep-power-in-suspend;
+               //cap-sdio-irq;
+               status = "okay";
 };
 
 &spi0 {
        status = "okay";
+       max-freq = <48000000>;  
+       /*
+       spi_test@00 {
+               compatible = "rockchip,spi_test_bus0_cs0";
+                reg = <0>;
+                spi-max-frequency = <24000000>;
+                //spi-cpha;
+               //spi-cpol;
+                poll_mode = <0>;
+               type = <0>;
+               enable_dma = <0>;
+
+       };
+
+       spi_test@01 {
+               compatible = "rockchip,spi_test_bus0_cs1";
+               reg = <1>;
+               spi-max-frequency = <24000000>;
+               spi-cpha;
+               spi-cpol;
+               poll_mode = <0>;
+               type = <0>;
+               enable_dma = <0>;               
+       };
+       */
 };
 
 &spi1 {
        status = "okay";
+       max-freq = <48000000>;
+       /*
+       spi_test@10 {
+               compatible = "rockchip,spi_test_bus1_cs0";
+               reg = <0>;
+               spi-max-frequency = <24000000>;
+               //spi-cpha;
+               //spi-cpol;
+               poll_mode = <0>;
+               type = <0>;
+               enable_dma = <0>;
+       };
+
+       */
 };
 
 &spi2 {
        status = "okay";
+       max-freq = <48000000>;
+       /*
+       spi_test@20 {
+               compatible = "rockchip,spi_test_bus2_cs0";
+               reg = <0>;
+               spi-max-frequency = <24000000>;
+               //spi-cpha;
+               //spi-cpol;
+               poll_mode = <0>;
+               type = <0>;
+               enable_dma = <0>;
+       };
+
+       spi_test@21 {
+               compatible = "rockchip,spi_test_bus2_cs1";
+               reg = <1>;
+               spi-max-frequency = <24000000>;
+               //spi-cpha;
+               //spi-cpol;
+               poll_mode = <0>;
+               type = <0>;
+               enable_dma = <0>;
+       };
+       */
+};
+
+&uart_bt {
+        status = "okay";
+        dma-names = "!tx", "!rx";
+        pinctrl-0 = <&uart0_xfer &uart0_cts>;
 };
 
 &i2c0 {
        bq24296: bq24296@6b {
                compatible = "ti,bq24296";
                reg = <0x6b>;
-               gpios = <&gpio0 GPIO_A7 GPIO_ACTIVE_HIGH>;
-               bq24296,chg_current = <1000 500 2000>;
+               gpios = <&gpio0 GPIO_A7 GPIO_ACTIVE_HIGH>,<&gpio0 GPIO_B0 GPIO_ACTIVE_HIGH>;
+               bq24296,chg_current = <1000 2000 3000>;
                status = "okay";
        };
        bq27320: bq27320@55 {
        /*   gpios = <&gpio0 GPIO_A7 GPIO_ACTIVE_HIGH>; */
                status = "okay";
        };
+
+       CW2015@62 {
+               compatible = "cw201x";
+               reg = <0x62>;
+               dc_det_gpio = <&gpio0 GPIO_B0 GPIO_ACTIVE_LOW>;
+               bat_low_gpio = <&gpio0 GPIO_A7 GPIO_ACTIVE_LOW>;
+               chg_ok_gpio = <&gpio0 GPIO_B1 GPIO_ACTIVE_HIGH>;
+               bat_config_info = <0x15 0x42 0x60 0x59 0x52 0x58 0x4D 0x48 0x48 0x44 0x44 0x46 0x49 0x48 0x32
+                       0x24 0x20 0x17 0x13 0x0F 0x19 0x3E 0x51 0x45 0x08 0x76 0x0B 0x85 0x0E 0x1C 0x2E 0x3E 0x4D 0x52 0x52
+                       0x57 0x3D 0x1B 0x6A 0x2D 0x25 0x43 0x52 0x87 0x8F 0x91 0x94 0x52 0x82 0x8C 0x92 0x96 0xFF 0x7B 0xBB
+                       0xCB 0x2F 0x7D 0x72 0xA5 0xB5 0xC1 0x46 0xAE>;
+               is_dc_charge = <1>;
+               is_usb_charge = <0>;
+       };
 };
 
 &i2c1 {
        rt3261: rt3261@1c {
                compatible = "rt3261";
                reg = <0x1c>;
-               codec-en-gpio = <0>;//sdk default high level
+       //      codec-en-gpio = <0>;//sdk default high level
                spk-num= <2>;
                modem-input-mode = <1>;
                lout-to-modem_mode = <1>;
 };
 
 &i2c5 {
-       status = "okay";
+       status = "disable";
 };
 
 &fb {
                        rockchip,delay = <10>;
                };
                
-               /*lcd_cs:lcd_cs {
-                       rockchip,power_type = <REGULATOR>;
+               lcd_cs:lcd_cs {
+rockchip,power_type = <GPIO>;
+                       gpios = <&gpio7 GPIO_A4 GPIO_ACTIVE_HIGH>;
                        rockchip,delay = <10>;
                };
 
-               lcd_rst:lcd_rst {
+               /*lcd_rst:lcd_rst {
                        rockchip,power_type = <GPIO>;
                        gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>;
                        rockchip,delay = <5>;
 &adc {
        status = "okay";
 
+       rockchip_headset {
+               compatible = "rockchip_headset";
+               headset_gpio = <&gpio0 GPIO_C2 GPIO_ACTIVE_LOW>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&gpio0_c2>;
+               io-channels = <&adc 2>; 
+       /*
+               hook_gpio = ;
+               hook_down_type = ; //interrupt hook key down status 
+               */       
+       };
+
        key {
                compatible = "rockchip,key";
                io-channels = <&adc 1>;
                };
 
                menu-key {
-                       linux,code = <139>;
+                       linux,code = <59>;
                        label = "menu";
                        rockchip,adc_value = <355>;
                };
 &clk_core_dvfs_table {
        operating-points = <
                /* KHz    uV */
-               312000 1100000
-               504000 1100000
-               816000 1100000
-               1008000 1100000
+               126000 850000
+               216000 850000
+               312000 850000
+               408000 850000
+               600000 850000
+               696000 900000
+               816000 950000
+               1008000 1000000
+               1200000 1050000
+               1416000 1150000
                >;
+       status="okay";
 };
 
 &clk_gpu_dvfs_table {
        operating-points = <
                /* KHz    uV */
-               200000 1200000
-               300000 1200000
-               400000 1200000
+               100000 850000
+               200000 850000
+               300000 900000
+               400000 1000000
+               500000 1100000
+               600000 1250000
                >;
+       status="okay";
 };
 
 &clk_ddr_dvfs_table {
        operating-points = <
                /* KHz    uV */
-               200000 1200000
-               300000 1200000
-               400000 1200000
+               200000 950000
+               300000 950000
+               400000 1000000
+               533000 1050000
                >;
 
        freq_table = <
                SYS_STATUS_VIDEO        300000
                SYS_STATUS_DUALVIEW     500000
                >;
+       status="okay";
 };
 
 /include/ "rk808.dtsi"
 &rk808 {
        gpios =<&gpio0 GPIO_A4 GPIO_ACTIVE_HIGH>,<&gpio0 GPIO_B3 GPIO_ACTIVE_LOW>;
+       rk808,system-power-controller;
 
        regulators {
                
                };
 
                rk808_ldo5_reg: regulator@8 {
-                       regulator-name= "rk_ldo5";
-                       regulator-min-microvolt = <3300000>;
+                       regulator-name= "vcc_sd";
+                       regulator-min-microvolt = <1800000>;
                        regulator-max-microvolt = <3300000>;
                        regulator-always-on;
                        regulator-boot-on;
                        regulator-always-on;
                        regulator-boot-on;
                };
+
+               rk808_ldo9_reg: regulator@12 {
+                       regulator-name= "rk_ldo9";
+                       regulator-always-on;
+                       regulator-boot-on;
+               };
+
+               rk808_ldo10_reg: regulator@13 {
+                       regulator-name= "rk_ldo10";
+                       regulator-always-on;
+                       regulator-boot-on;
+               };
        };
 };
+
+&lcdc_vdd_domain {
+       regulator-name = "vcc30_lcd";
+       };
+&dpio_vdd_domain{
+       regulator-name = "vcc18_cif";   
+       };
+&flash0_vdd_domain{
+       regulator-name = "vcc_flash";   
+       };
+&flash1_vdd_domain{
+       regulator-name = "vcc_flash";                   
+       };
+&apio3_vdd_domain{
+       regulator-name = "vccio_wl";            
+       };
+&apio5_vdd_domain{
+       regulator-name = "vccio";               
+       };
+&apio4_vdd_domain{
+       regulator-name = "vccio";               
+       };
+&apio1_vdd_domain{
+       regulator-name = "vccio";                       
+       };
+&apio2_vdd_domain{
+       regulator-name = "vccio";               
+       };
+&sdmmc0_vdd_domain{
+       regulator-name = "vcc_sd";                      
+       };
+