arm: dts: rk3228: add some assigned-clocks

[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / rk322x.dtsi

diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index 0fec9b860aa135b5ce90b6e23cd01f938513864d..52158d756299398f44801b4da39c0c6b3f744132 100644 (file)
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -138,6 +138,47 @@
                #clock-cells = <0>;
        };
 
+       i2s1: i2s1@100b0000 {
+               compatible = "rockchip,rk3228-i2s", "rockchip,rk3066-i2s";
+               reg = <0x100b0000 0x4000>;
+               interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clock-names = "i2s_clk", "i2s_hclk";
+               clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S1_8CH>;
+               dmas = <&pdma 14>, <&pdma 15>;
+               dma-names = "tx", "rx";
+               pinctrl-names = "default";
+               pinctrl-0 = <&i2s1_bus>;
+               status = "disabled";
+       };
+
+       i2s0: i2s0@100c0000 {
+               compatible = "rockchip,rk3228-i2s", "rockchip,rk3066-i2s";
+               reg = <0x100c0000 0x4000>;
+               interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clock-names = "i2s_clk", "i2s_hclk";
+               clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0_8CH>;
+               dmas = <&pdma 11>, <&pdma 12>;
+               dma-names = "tx", "rx";
+               status = "disabled";
+       };
+
+       i2s2: i2s2@100e0000 {
+               compatible = "rockchip,rk3228-i2s", "rockchip,rk3066-i2s";
+               reg = <0x100e0000 0x4000>;
+               interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clock-names = "i2s_clk", "i2s_hclk";
+               clocks = <&cru SCLK_I2S2>, <&cru HCLK_I2S2_2CH>;
+               dmas = <&pdma 0>, <&pdma 1>;
+               dma-names = "tx", "rx";
+               status = "disabled";
+       };
+
        grf: syscon@11000000 {
                compatible = "syscon";
                reg = <0x11000000 0x1000>;
@@ -295,8 +336,18 @@
                rockchip,grf = <&grf>;
                #clock-cells = <1>;
                #reset-cells = <1>;
-               assigned-clocks = <&cru PLL_GPLL>;
-               assigned-clock-rates = <594000000>;
+               assigned-clocks =
+                       <&cru PLL_GPLL>, <&cru ARMCLK>,
+                       <&cru PLL_CPLL>, <&cru ACLK_PERI>,
+                       <&cru HCLK_PERI>, <&cru PCLK_PERI>,
+                       <&cru ACLK_CPU>, <&cru HCLK_CPU>,
+                       <&cru PCLK_CPU>;
+               assigned-clock-rates =
+                       <594000000>, <816000000>,
+                       <500000000>, <150000000>,
+                       <150000000>, <75000000>,
+                       <150000000>, <150000000>,
+                       <75000000>;
        };
 
        thermal-zones {
@@ -374,6 +425,25 @@
                status = "disabled";
        };
 
+       gmac: ethernet@30200000 {
+               compatible = "rockchip,rk3228-gmac";
+               reg = <0x30200000 0x10000>;
+               interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "macirq";
+               clocks = <&cru SCLK_MAC>, <&cru SCLK_MAC_RX>,
+                       <&cru SCLK_MAC_TX>, <&cru SCLK_MAC_REF>,
+                       <&cru SCLK_MAC_REFOUT>, <&cru ACLK_GMAC>,
+                       <&cru PCLK_GMAC>;
+               clock-names = "stmmaceth", "mac_clk_rx",
+                       "mac_clk_tx", "clk_mac_ref",
+                       "clk_mac_refout", "aclk_mac",
+                       "pclk_mac";
+               resets = <&cru SRST_GMAC>;
+               reset-names = "stmmaceth";
+               rockchip,grf = <&grf>;
+               status = "disabled";
+       };
+
        gic: interrupt-controller@32010000 {
                compatible = "arm,gic-400";
                interrupt-controller;
@@ -381,7 +451,7 @@
                #address-cells = <0>;
 
                reg = <0x32011000 0x1000>,
-                     <0x32012000 0x1000>,
+                     <0x32012000 0x2000>,
                      <0x32014000 0x2000>,
                      <0x32016000 0x2000>;
                interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
@@ -458,6 +528,10 @@
                        bias-disable;
                };
 
+               pcfg_pull_none_drv_12ma: pcfg-pull-none-drv-12ma {
+                       drive-strength = <12>;
+               };
+
                emmc {
                        emmc_clk: emmc-clk {
                                rockchip,pins = <2 7 RK_FUNC_2 &pcfg_pull_none>;
@@ -479,6 +553,44 @@
                        };
                };
 
+               gmac {
+                       rgmii_pins: rgmii-pins {
+                               rockchip,pins = <2 14 RK_FUNC_1 &pcfg_pull_none>,
+                                               <2 12 RK_FUNC_1 &pcfg_pull_none>,
+                                               <2 25 RK_FUNC_1 &pcfg_pull_none>,
+                                               <2 19 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
+                                               <2 18 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
+                                               <2 22 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
+                                               <2 23 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
+                                               <2 9 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
+                                               <2 13 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
+                                               <2 17 RK_FUNC_1 &pcfg_pull_none>,
+                                               <2 16 RK_FUNC_1 &pcfg_pull_none>,
+                                               <2 21 RK_FUNC_2 &pcfg_pull_none>,
+                                               <2 20 RK_FUNC_2 &pcfg_pull_none>,
+                                               <2 11 RK_FUNC_1 &pcfg_pull_none>,
+                                               <2 8 RK_FUNC_1 &pcfg_pull_none>;
+                       };
+
+                       rmii_pins: rmii-pins {
+                               rockchip,pins = <2 14 RK_FUNC_1 &pcfg_pull_none>,
+                                               <2 12 RK_FUNC_1 &pcfg_pull_none>,
+                                               <2 25 RK_FUNC_1 &pcfg_pull_none>,
+                                               <2 19 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
+                                               <2 18 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
+                                               <2 13 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
+                                               <2 17 RK_FUNC_1 &pcfg_pull_none>,
+                                               <2 16 RK_FUNC_1 &pcfg_pull_none>,
+                                               <2 8 RK_FUNC_1 &pcfg_pull_none>,
+                                               <2 15 RK_FUNC_1 &pcfg_pull_none>;
+                       };
+
+                       phy_pins: phy-pins {
+                               rockchip,pins = <2 14 RK_FUNC_2 &pcfg_pull_none>,
+                                               <2 8 RK_FUNC_2 &pcfg_pull_none>;
+                       };
+               };
+
                i2c0 {
                        i2c0_xfer: i2c0-xfer {
                                rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>,
@@ -507,6 +619,20 @@
                        };
                };
 
+               i2s1 {
+                       i2s1_bus: i2s1-bus {
+                               rockchip,pins = <0 8 RK_FUNC_1 &pcfg_pull_none>,
+                                               <0 9 RK_FUNC_1 &pcfg_pull_none>,
+                                               <0 11 RK_FUNC_1 &pcfg_pull_none>,
+                                               <0 12 RK_FUNC_1 &pcfg_pull_none>,
+                                               <0 13 RK_FUNC_1 &pcfg_pull_none>,
+                                               <0 14 RK_FUNC_1 &pcfg_pull_none>,
+                                               <1 2 RK_FUNC_1 &pcfg_pull_none>,
+                                               <1 4 RK_FUNC_1 &pcfg_pull_none>,
+                                               <1 5 RK_FUNC_1 &pcfg_pull_none>;
+                       };
+               };
+
                pwm0 {
                        pwm0_pin: pwm0-pin {
                                rockchip,pins = <3 21 RK_FUNC_1 &pcfg_pull_none>;