#include <dt-bindings/pinctrl/rockchip-rk3188.h>
/ {
- pinctrl@20008000 {
+ pinctrl: pinctrl@20008000 {
compatible = "rockchip,rk3188-pinctrl";
- reg = <0x20008000 0xa0>,
- <0x20008164 0x1a0>;
- reg-names = "base", "pull";
+ reg = <0x20008000 0x60>,
+ <0x20008060 0x40>,
+ <0x20008164 0x40>,
+ <0x200080f4 0x10>;
+ reg-names = "base", "mux", "pull", "drv";
#address-cells = <1>;
#size-cells = <1>;
ranges;
compatible = "rockchip,rk3188-gpio-bank0";
reg = <0x2000a000 0x100>,
<0x20004064 0x8>;
+ reg-names = "base", "pull_bank0";
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_gates8 9>;
gpio15: gpio15@20082000 {
compatible = "rockchip,gpio-bank";
reg = <0x20082000 0x100>;
- interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;//127 = 160-32-1
+ clocks = <&clk_gates8 12>;
gpio-controller;
#gpio-cells = <2>;
rockchip,drive = <VALUE_DRV_DEFAULT>;
//rockchip,tristate = <VALUE_TRI_DEFAULT>;
};
+
+ uart0_rts_gpio: uart0-rts-gpio {
+ rockchip,pins = <FUNC_TO_GPIO(UART0_RTSN)>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ };
};
gpio1_uart1 {
rockchip,drive = <VALUE_DRV_DEFAULT>;
//rockchip,tristate = <VALUE_TRI_DEFAULT>;
};
+
+ uart1_rts_gpio: uart1-rts-gpio {
+ rockchip,pins = <FUNC_TO_GPIO(UART1_RTSN)>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ };
};
gpio1_uart2 {
rockchip,drive = <VALUE_DRV_DEFAULT>;
//rockchip,tristate = <VALUE_TRI_DEFAULT>;
};
+
+ uart3_rts_gpio: uart3-rts-gpio {
+ rockchip,pins = <FUNC_TO_GPIO(UART3_RTSN)>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ };
};
gpio1_i2c0 {
};
};
- gpio1_i2c3 {
+ gpio3_i2c3 {
i2c3_sda:i2c3-sda {
rockchip,pins = <I2C3_SDA>;
rockchip,pull = <VALUE_PULL_DISABLE>;
rockchip,pins = <I2S0_MCLK>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,voltage = <VALUE_VOL_DEFAULT>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_8MA>;
//rockchip,tristate = <VALUE_TRI_DEFAULT>;
};
rockchip,pins = <I2S0_SCLK>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,voltage = <VALUE_VOL_DEFAULT>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_8MA>;
//rockchip,tristate = <VALUE_TRI_DEFAULT>;
};
rockchip,pins = <I2S0_LRCKRX>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,voltage = <VALUE_VOL_DEFAULT>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_8MA>;
//rockchip,tristate = <VALUE_TRI_DEFAULT>;
};
rockchip,pins = <I2S0_LRCKTX>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,voltage = <VALUE_VOL_DEFAULT>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_8MA>;
//rockchip,tristate = <VALUE_TRI_DEFAULT>;
};
rockchip,pins = <I2S0_SDO>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,voltage = <VALUE_VOL_DEFAULT>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_8MA>;
//rockchip,tristate = <VALUE_TRI_DEFAULT>;
};
rockchip,pins = <I2S0_SDI>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,voltage = <VALUE_VOL_DEFAULT>;
- rockchip,drive = <VALUE_DRV_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_8MA>;
//rockchip,tristate = <VALUE_TRI_DEFAULT>;
};
+ i2s0_gpio: i2s0-gpio {
+ rockchip,pins = <FUNC_TO_GPIO(I2S0_MCLK)>,
+ <FUNC_TO_GPIO(I2S0_SCLK)>,
+ <FUNC_TO_GPIO(I2S0_LRCKRX)>,
+ <FUNC_TO_GPIO(I2S0_LRCKTX)>,
+ <FUNC_TO_GPIO(I2S0_SDO)>,
+ <FUNC_TO_GPIO(I2S0_SDI)>;
+ rockchip,drive = <VALUE_DRV_8MA>;
+ };
+ };
+
+ gpio2_lcdc1 {
+ lcdc1_lcdc:lcdc1-lcdc {
+ rockchip,pins = <LCDC1_D0>,
+ <LCDC1_D1>,
+ <LCDC1_D2>,
+ <LCDC1_D3>,
+ <LCDC1_D4>,
+ <LCDC1_D5>,
+ <LCDC1_D6>,
+ <LCDC1_D7>,
+ <LCDC1_D8>,
+ <LCDC1_D9>,
+ <LCDC1_D10>,
+ <LCDC1_D11>,
+ <LCDC1_D12>,
+ <LCDC1_D13>,
+ <LCDC1_D14>,
+ <LCDC1_D15>,
+ <LCDC1_D16>,
+ <LCDC1_D17>,
+ <LCDC1_D18>,
+ <LCDC1_D19>,
+ <LCDC1_D20>,
+ <LCDC1_D21>,
+ <LCDC1_D22>,
+ <LCDC1_D23>,
+ <LCDC1_DCLK>,
+ <LCDC1_DEN>,
+ <LCDC1_HSYNC>,
+ <LCDC1_VSYNC>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ };
+
+ lcdc1_gpio:lcdc1-gpio {
+ rockchip,pins = <FUNC_TO_GPIO(LCDC1_D0)>,
+ <FUNC_TO_GPIO(LCDC1_D1)>,
+ <FUNC_TO_GPIO(LCDC1_D2)>,
+ <FUNC_TO_GPIO(LCDC1_D3)>,
+ <FUNC_TO_GPIO(LCDC1_D4)>,
+ <FUNC_TO_GPIO(LCDC1_D5)>,
+ <FUNC_TO_GPIO(LCDC1_D6)>,
+ <FUNC_TO_GPIO(LCDC1_D7)>,
+ <FUNC_TO_GPIO(LCDC1_D8)>,
+ <FUNC_TO_GPIO(LCDC1_D9)>,
+ <FUNC_TO_GPIO(LCDC1_D10)>,
+ <FUNC_TO_GPIO(LCDC1_D11)>,
+ <FUNC_TO_GPIO(LCDC1_D12)>,
+ <FUNC_TO_GPIO(LCDC1_D13)>,
+ <FUNC_TO_GPIO(LCDC1_D14)>,
+ <FUNC_TO_GPIO(LCDC1_D15)>,
+ <FUNC_TO_GPIO(LCDC1_D16)>,
+ <FUNC_TO_GPIO(LCDC1_D17)>,
+ <FUNC_TO_GPIO(LCDC1_D18)>,
+ <FUNC_TO_GPIO(LCDC1_D19)>,
+ <FUNC_TO_GPIO(LCDC1_D20)>,
+ <FUNC_TO_GPIO(LCDC1_D21)>,
+ <FUNC_TO_GPIO(LCDC1_D22)>,
+ <FUNC_TO_GPIO(LCDC1_D23)>,
+ <FUNC_TO_GPIO(LCDC1_DCLK)>,
+ <FUNC_TO_GPIO(LCDC1_DEN)>,
+ <FUNC_TO_GPIO(LCDC1_HSYNC)>,
+ <FUNC_TO_GPIO(LCDC1_VSYNC)>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+
+ };
+
+ };
+
+ gpio1_spdif {
+ spdif_tx: spdif-tx {
+ rockchip,pins = <SPDIF_TX>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ //rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ //rockchip,tristate = <VALUE_TRI_DEFAULT>;
+
+ };
};
gpio3_pwm {
- pwm0:pwm0 {
+ pwm0_pin:pwm0 {
rockchip,pins = <PWM0>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,voltage = <VALUE_VOL_DEFAULT>;
};
- pwm1:pwm1 {
+ pwm1_pin:pwm1 {
rockchip,pins = <PWM1>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,voltage = <VALUE_VOL_DEFAULT>;
};
- pwm2:pwm2 {
+ pwm2_pin:pwm2 {
rockchip,pins = <PWM2>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,voltage = <VALUE_VOL_DEFAULT>;
};
- pwm3:pwm3 {
+ pwm3_pin:pwm3 {
rockchip,pins = <PWM3>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,voltage = <VALUE_VOL_DEFAULT>;
sd0_cmd: sd0-cmd {
rockchip,pins = <MMC0_CMD>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,pull = <VALUE_PULL_UP>;
//rockchip,voltage = <VALUE_VOL_DEFAULT>;
rockchip,drive = <VALUE_DRV_DEFAULT>;
//rockchip,tristate = <VALUE_TRI_DEFAULT>;
sd0_cd: sd0-cd {
rockchip,pins = <MMC0_DETN>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,pull = <VALUE_PULL_UP>;
//rockchip,voltage = <VALUE_VOL_DEFAULT>;
rockchip,drive = <VALUE_DRV_DEFAULT>;
//rockchip,tristate = <VALUE_TRI_DEFAULT>;
};
+ sd0_cd_gpio:sd0_cd_gpio{
+ rockchip,pins = <FUNC_TO_GPIO(MMC0_DETN)>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ };
+
sd0_wp: sd0-wp {
rockchip,pins = <MMC0_WRPRT>;
rockchip,pull = <VALUE_PULL_DISABLE>;
sd0_bus1: sd0-bus-width1 {
rockchip,pins = <MMC0_D0>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,pull = <VALUE_PULL_UP>;
//rockchip,voltage = <VALUE_VOL_DEFAULT>;
rockchip,drive = <VALUE_DRV_DEFAULT>;
//rockchip,tristate = <VALUE_TRI_DEFAULT>;
<MMC0_D1>,
<MMC0_D2 >,
<MMC0_D3>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,pull = <VALUE_PULL_UP>;
//rockchip,voltage = <VALUE_VOL_DEFAULT>;
rockchip,drive = <VALUE_DRV_DEFAULT>;
//rockchip,tristate = <VALUE_TRI_DEFAULT>;
sd1_cmd: sd1-cmd {
rockchip,pins = <MMC1_CMD>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,pull = <VALUE_PULL_UP>;
//rockchip,voltage = <VALUE_VOL_DEFAULT>;
rockchip,drive = <VALUE_DRV_DEFAULT>;
//rockchip,tristate = <VALUE_TRI_DEFAULT>;
sd1_cd: sd1-cd {
rockchip,pins = <MMC1_DETN>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,pull = <VALUE_PULL_UP>;
//rockchip,voltage = <VALUE_VOL_DEFAULT>;
rockchip,drive = <VALUE_DRV_DEFAULT>;
//rockchip,tristate = <VALUE_TRI_DEFAULT>;
sd1_bus1: sd1-bus-width1 {
rockchip,pins = <MMC1_D0>;
- rockchip,pull = <VALUE_PULL_DISABLE>;
+ rockchip,pull = <VALUE_PULL_UP>;
//rockchip,voltage = <VALUE_VOL_DEFAULT>;
rockchip,drive = <VALUE_DRV_DEFAULT>;
//rockchip,tristate = <VALUE_TRI_DEFAULT>;
<MMC1_D1>,
<MMC1_D2>,
<MMC1_D3>;
+ rockchip,pull = <VALUE_PULL_UP>;
+ //rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ //rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+ };
+
+ gpio3_rmii {
+ rmii_clkoutpin: rmii-clkoutpin {
+ rockchip,pins = <RMII_CLKOUT>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ //rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ //rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ rmii_clkinpin: rmii-clkinpin {
+ rockchip,pins = <RMII_CLKIN>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ //rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ //rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ rmii_txpins: rmii-txpins {
+ rockchip,pins = <RMII_TXEN>, <RMII_TXD1>, <RMII_TXD0>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ //rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ //rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ rmii_rxpins: rmii-rxpins {
+ rockchip,pins = <RMII_RXD0>, <RMII_RXD1>, <RMII_RXERR>, <RMII_CRS>;
+ rockchip,pull = <VALUE_PULL_DISABLE>;
+ //rockchip,voltage = <VALUE_VOL_DEFAULT>;
+ rockchip,drive = <VALUE_DRV_DEFAULT>;
+ //rockchip,tristate = <VALUE_TRI_DEFAULT>;
+ };
+
+ rmii_mdpins: rmii-mdpins {
+ rockchip,pins = <RMII_MD>, <RMII_MDCLK>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,voltage = <VALUE_VOL_DEFAULT>;
rockchip,drive = <VALUE_DRV_DEFAULT>;
};
};
- gps {
+ gpio1_gps {
gps_mag:gps-mag {
rockchip,pins = <GPS_MAG>;
rockchip,pull = <VALUE_PULL_DISABLE>;
rockchip,voltage = <VALUE_VOL_DEFAULT>;
};
+
+
+ ap0_vcc_18:ap0-vcc-18 {
+ rockchip,pins = <VIRTUAL_PIN_FOR_AP0_VCC>;
+ rockchip,voltage = <VALUE_VOL_1V8>;
+ };
+
+ ap1_vcc_18:ap1-vcc-18 {
+ rockchip,pins = <VIRTUAL_PIN_FOR_AP1_VCC>;
+ rockchip,voltage = <VALUE_VOL_1V8>;
+ };
+
+ cif_vcc_18:cif-vcc-18 {
+ rockchip,pins = <VIRTUAL_PIN_FOR_CIF_VCC>;
+ rockchip,voltage = <VALUE_VOL_1V8>;
+ };
+
+ flash_vcc_18:flash-vcc-18 {
+ rockchip,pins = <VIRTUAL_PIN_FOR_FLASH_VCC>;
+ rockchip,voltage = <VALUE_VOL_1V8>;
+ };
+
+ vccio0_vcc_18:vccio0-vcc-18 {
+ rockchip,pins = <VIRTUAL_PIN_FOR_VCCIO0_VCC>;
+ rockchip,voltage = <VALUE_VOL_1V8>;
+ };
+
+ vccio1_vcc_18:vccio1-vcc-18 {
+ rockchip,pins = <VIRTUAL_PIN_FOR_VCCIO1_VCC>;
+ rockchip,voltage = <VALUE_VOL_1V8>;
+ };
+
+ lcdc0_vcc_18:lcdc0-vcc-18 {
+ rockchip,pins = <VIRTUAL_PIN_FOR_LCDC0_VCC>;
+ rockchip,voltage = <VALUE_VOL_1V8>;
+ };
+
+ lcdc1_vcc_18:lcdc1-vcc-18 {
+ rockchip,pins = <VIRTUAL_PIN_FOR_LCDC1_VCC>;
+ rockchip,voltage = <VALUE_VOL_1V8>;
+ };
+
+
+
+ ap0_vcc_33:ap0-vcc-33 {
+ rockchip,pins = <VIRTUAL_PIN_FOR_AP0_VCC>;
+ rockchip,voltage = <VALUE_VOL_3V3>;
+ };
+
+ ap1_vcc_33:ap1-vcc-33 {
+ rockchip,pins = <VIRTUAL_PIN_FOR_AP1_VCC>;
+ rockchip,voltage = <VALUE_VOL_3V3>;
+ };
+
+ cif_vcc_33:cif-vcc-33 {
+ rockchip,pins = <VIRTUAL_PIN_FOR_CIF_VCC>;
+ rockchip,voltage = <VALUE_VOL_3V3>;
+ };
+
+ flash_vcc_33:flash-vcc-33 {
+ rockchip,pins = <VIRTUAL_PIN_FOR_FLASH_VCC>;
+ rockchip,voltage = <VALUE_VOL_3V3>;
+ };
+
+ vccio0_vcc_33:vccio0-vcc-33 {
+ rockchip,pins = <VIRTUAL_PIN_FOR_VCCIO0_VCC>;
+ rockchip,voltage = <VALUE_VOL_3V3>;
+ };
+
+ vccio1_vcc_33:vccio1-vcc-33 {
+ rockchip,pins = <VIRTUAL_PIN_FOR_VCCIO1_VCC>;
+ rockchip,voltage = <VALUE_VOL_3V3>;
+ };
+
+ lcdc0_vcc_33:lcdc0-vcc-33 {
+ rockchip,pins = <VIRTUAL_PIN_FOR_LCDC0_VCC>;
+ rockchip,voltage = <VALUE_VOL_3V3>;
+ };
+
+ lcdc1_vcc_33:lcdc1-vcc-33 {
+ rockchip,pins = <VIRTUAL_PIN_FOR_LCDC1_VCC>;
+ rockchip,voltage = <VALUE_VOL_3V3>;
+ };
+
+
};
//to add
projects / firefly-linux-kernel-4.4.55.git / blobdiff