pdma: pdma@20078000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x20078000 0x4000>;
+ clocks = <&clk_gates5 1>;
+ clock-names = "apb_pclk";
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
/*aclk_peri_pre*/
//<&clk_gates10 10>,/*aclk_gmac*/
<&clk_gates4 3>,/*aclk_peri_axi_matrix*/
- <&clk_gates5 1>,/*aclk_dmac2*/
+ //<&clk_gates5 1>,/*aclk_dmac2*/
<&clk_gates9 15>,/*aclk_peri_niu*/
<&clk_gates9 2>,/*g_pclk_pmu*/
<&clk_gates9 3>,/*g_pclk_pmu_noc*/
dwc_control_usb: dwc-control-usb@20008000 {
compatible = "rockchip,rk3126-dwc-control-usb";
reg = <0x20008000 0x4>;
- interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "otg_bvalid";
+ interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "otg_bvalid",
+ "otg0_linestate",
+ "otg1_linestate";
clocks = <&clk_gates9 13>;
clock-names = "hclk_usb_peri";
rockchip,remote_wakeup;
compatible = "rockchip,rk3126_ehci";
reg = <0x101c0000 0x20000>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk_gates1 6>, <&clk_gates7 3>, <&clk_gates10 14>;
- clock-names = "clk_usbphy1", "hclk_hoct0_3126","hclk_host0_3126b";
+ clocks = <&clk_gates1 6>, <&clk_gates7 3>;
+ clock-names = "clk_usbphy1", "hclk_host0";
resets = <&reset RK3128_RST_USBOTG1>, <&reset RK3128_RST_UTMI1>,
<&reset RK3128_RST_OTGC1>;
reset-names = "host_ahb", "host_phy", "host_controller";
pinctrl-1 = <&hdmi_gpio>;
clocks = <&clk_gates3 8>, <&pd_hdmi>;
clock-names = "pclk_hdmi", "pd_hdmi";
+ rockchip,hdcp_enable = <0>;
+ rockchip,cec_enable = <0>;
status = "disabled";
};
status = "disabled";
};
- vpu: vpu_service@10106000 {
- compatible = "vpu_service";
+ vpu: vpu_service {
+ compatible = "rockchip,vpu_sub";
iommu_enabled = <1>;
reg = <0x10106000 0x800>;
- interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "irq_enc", "irq_dec";
- clocks = <&clk_vdpu>, <&hclk_vdpu>;
- clock-names = "aclk_vcodec", "hclk_vcodec";
+ dev_mode = <0>;
name = "vpu_service";
- status = "okay";
};
- hevc: hevc_service@10104000 {
- compatible = "rockchip,hevc_service";
+ hevc: hevc_service {
+ compatible = "rockchip,hevc_sub";
iommu_enabled = <1>;
reg = <0x10104000 0x400>;
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "irq_dec";
+ dev_mode = <1>;
+ name = "hevc_service";
+ };
+
+ vpu_combo: vpu_combo@ff9a0000 {
+ compatible = "rockchip,vpu_combo";
+ subcnt = <2>;
+ rockchip,sub = <&vpu>, <&hevc>;
clocks = <&clk_vdpu>, <&hclk_vdpu>, <&clk_hevc_core>;
clock-names = "aclk_vcodec", "hclk_vcodec", "clk_core";
- name = "hevc_service";
+ mode_bit = <15>;
+ mode_ctrl = <0x144>;
+ name = "vpu_combo";
status = "okay";
};