};
};
+ psci {
+ compatible = "arm,psci";
+ method = "smc";
+ cpu_suspend = <0x84000001>;
+ cpu_off = <0x84000002>;
+ cpu_on = <0x84000003>;
+ migrate = <0x84000005>;
+ };
+
gic: interrupt-controller@10139000 {
compatible = "arm,cortex-a15-gic";
interrupt-controller;
pdma: pdma@20078000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x20078000 0x4000>;
+ clocks = <&clk_gates5 1>;
+ clock-names = "apb_pclk";
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
/*aclk_peri_pre*/
//<&clk_gates10 10>,/*aclk_gmac*/
<&clk_gates4 3>,/*aclk_peri_axi_matrix*/
- <&clk_gates5 1>,/*aclk_dmac2*/
+ //<&clk_gates5 1>,/*aclk_dmac2*/
<&clk_gates9 15>,/*aclk_peri_niu*/
<&clk_gates9 2>,/*g_pclk_pmu*/
<&clk_gates9 3>,/*g_pclk_pmu_noc*/
status = "disabled";
};
- i2s0: i2s@10220000 {
+ i2s0: i2s0@10220000 {
compatible = "rockchip-i2s";
reg = <0x10220000 0x1000>;
i2s-id = <0>;
//pinctrl-names = "default", "sleep";
//pinctrl-0 = <&i2s0_mclk &i2s0_sclk &i2s0_lrckrx &i2s0_lrcktx &i2s0_sdi &i2s0_sdo>;
//pinctrl-1 = <&i2s0_gpio>;
+ status = "disabled";
};
- i2s1: i2s@10200000 {
+ i2s1: i2s1@10200000 {
compatible = "rockchip-i2s";
reg = <0x10200000 0x1000>;
i2s-id = <1>;
dmas = <&pdma 14>, <&pdma 15>;
//#dma-cells = <2>;
dma-names = "tx", "rx";
- status = "disabled";
};
spdif: spdif@10204000 {
num-slots = <1>;
fifo-depth = <0x100>;
bus-width = <8>;
+ cru_regsbase = <0x124>;
+ cru_reset_offset = <3>;
};
pinctrl-names = "default", "idle", "udbg";
pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
pinctrl-1 = <&sdmmc0_gpio>;
- pinctrl-2 = <&uart2_xfer>;
+ pinctrl-2 = <&uart2_xfer &sdmmc0_dectn>;
clocks = <&clk_sdmmc0>, <&clk_gates5 10>;
clock-names = "clk_mmc", "hclk_mmc";
dmas = <&pdma 10>;
num-slots = <1>;
fifo-depth = <0x100>;
bus-width = <4>;
+ cru_regsbase = <0x124>;
+ cru_reset_offset = <1>;
};
sdio: rksdmmc@10218000 {
num-slots = <1>;
fifo-depth = <0x100>;
bus-width = <4>;
+ cru_regsbase = <0x124>;
+ cru_reset_offset = <2>;
};
spi0: spi@20074000 {
dwc_control_usb: dwc-control-usb@20008000 {
compatible = "rockchip,rk3126-dwc-control-usb";
reg = <0x20008000 0x4>;
- interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "otg_bvalid";
+ interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "otg_bvalid",
+ "otg0_linestate",
+ "otg1_linestate";
clocks = <&clk_gates9 13>;
clock-names = "hclk_usb_peri";
rockchip,remote_wakeup;
rockchip,usb-mode = <0>;
};
- usb1: usb@101c0000 {
- compatible = "rockchip,rk3126_usb20_host";
- reg = <0x101c0000 0x40000>;
+ ehci: usb@101c0000 {
+ compatible = "rockchip,rk3126_ehci";
+ reg = <0x101c0000 0x20000>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk_gates1 6>, <&clk_gates10 14>;
- clock-names = "clk_usbphy1", "hclk_usb1";
+ clocks = <&clk_gates1 6>, <&clk_gates7 3>;
+ clock-names = "clk_usbphy1", "hclk_host0";
resets = <&reset RK3128_RST_USBOTG1>, <&reset RK3128_RST_UTMI1>,
<&reset RK3128_RST_OTGC1>;
reset-names = "host_ahb", "host_phy", "host_controller";
};
+ ohci: usb@101e0000 {
+ compatible = "rockchip,rk3126_ohci";
+ reg = <0x101e0000 0x20000>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
fb: fb{
compatible = "rockchip,rk-fb";
rockchip,disp-mode = <ONE_DUAL>;
pinctrl-1 = <&hdmi_gpio>;
clocks = <&clk_gates3 8>, <&pd_hdmi>;
clock-names = "pclk_hdmi", "pd_hdmi";
+ rockchip,hdcp_enable = <0>;
+ rockchip,cec_enable = <0>;
status = "disabled";
};
status = "disabled";
};
- vpu: vpu_service@10106000 {
- compatible = "vpu_service";
+ vpu: vpu_service {
+ compatible = "rockchip,vpu_sub";
iommu_enabled = <1>;
reg = <0x10106000 0x800>;
- interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "irq_enc", "irq_dec";
- clocks = <&clk_vdpu>, <&hclk_vdpu>;
- clock-names = "aclk_vcodec", "hclk_vcodec";
+ dev_mode = <0>;
name = "vpu_service";
- status = "okay";
};
- hevc: hevc_service@10104000 {
- compatible = "rockchip,hevc_service";
+ hevc: hevc_service {
+ compatible = "rockchip,hevc_sub";
iommu_enabled = <1>;
reg = <0x10104000 0x400>;
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "irq_dec";
+ dev_mode = <1>;
+ name = "hevc_service";
+ };
+
+ vpu_combo: vpu_combo@ff9a0000 {
+ compatible = "rockchip,vpu_combo";
+ subcnt = <2>;
+ rockchip,sub = <&vpu>, <&hevc>;
clocks = <&clk_vdpu>, <&hclk_vdpu>, <&clk_hevc_core>;
clock-names = "aclk_vcodec", "hclk_vcodec", "clk_core";
- name = "hevc_service";
+ resets = <&reset RK3128_RST_VCODEC_H>, <&reset RK3128_RST_VCODEC_A>,
+ <&reset RK3128_RST_HEVC>;
+ reset-names = "video_h", "video_a", "video";
+ mode_bit = <15>;
+ mode_ctrl = <0x144>;
+ name = "vpu_combo";
status = "okay";
};
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_gates9 8>, <&clk_gates9 7>;
clock-names = "aclk_iep", "hclk_iep";
+ version = <1>;
status = "okay";
};
#address-cells = <1>;
#size-cells = <0>;
- ion_cma: rockchip,ion-heap@1 { /* CMA HEAP */
+ ion_cma: rockchip,ion-heap@4 { /* CMA HEAP */
compatible = "rockchip,ion-heap";
- rockchip,ion_heap = <1>;
+ rockchip,ion_heap = <4>;
reg = <0x00000000 0x800000>; /* 8MB */
};
- rockchip,ion-heap@3 { /* VMALLOC HEAP */
+ rockchip,ion-heap@0 { /* VMALLOC HEAP */
compatible = "rockchip,ion-heap";
- rockchip,ion_heap = <3>;
+ rockchip,ion_heap = <0>;
};
};
cif: cif@1010a000 {
dais {
dai0 {
audio-codec = <&codec_hdmi_spdif>;
- i2s-controller = <&spdif>;
+ audio-controller = <&spdif>;
};
};
};
clocks = <&clk_gates5 14>;
clock-names = "g_pclk_acodec";
};
- rockchip-audio {
+ rockchip_audio: audio-rk312x {
compatible = "audio-rk312x";
dais {
dai0 {
audio-codec = <&codec>;
- i2s-controller = <&i2s0>;
+ audio-controller = <&i2s1>;
format = "i2s";
//continuous-clock;
//bitclock-inversion;
};
dai1 {
audio-codec = <&codec>;
- i2s-controller = <&i2s0>;
+ audio-controller = <&i2s1>;
format = "i2s";
//continuous-clock;
//bitclock-inversion;
projects / firefly-linux-kernel-4.4.55.git / blobdiff