ARM: rockchip: rk3228: implement function rk3228_restart

[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / rk312x.dtsi

diff --git a/arch/arm/boot/dts/rk312x.dtsi b/arch/arm/boot/dts/rk312x.dtsi
index 607235eb277da1b614f58c25fe3dd68f8ca3af6c..1324e24a8ccdaa217800c2db34f327ad089b32f7 100755 (executable)
--- a/arch/arm/boot/dts/rk312x.dtsi
+++ b/arch/arm/boot/dts/rk312x.dtsi
@@ -51,6 +51,15 @@
                };
        };
 
+       psci {
+               compatible      = "arm,psci";
+               method          = "smc";
+               cpu_suspend     = <0x84000001>;
+               cpu_off         = <0x84000002>;
+               cpu_on          = <0x84000003>;
+               migrate         = <0x84000005>;
+       };
+
        gic: interrupt-controller@10139000 {
                compatible = "arm,cortex-a15-gic";
                interrupt-controller;
@@ -169,6 +178,8 @@
                pdma: pdma@20078000 {
                        compatible = "arm,pl330", "arm,primecell";
                        reg = <0x20078000 0x4000>;
+                       clocks = <&clk_gates5 1>;
+                       clock-names = "apb_pclk";
                        interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
                        #dma-cells = <1>;
@@ -371,7 +382,7 @@
                                /*aclk_peri_pre*/
                                //<&clk_gates10 10>,/*aclk_gmac*/
                                <&clk_gates4 3>,/*aclk_peri_axi_matrix*/
-                               <&clk_gates5 1>,/*aclk_dmac2*/
+                               //<&clk_gates5 1>,/*aclk_dmac2*/
                                <&clk_gates9 15>,/*aclk_peri_niu*/
                                <&clk_gates9 2>,/*g_pclk_pmu*/
                                <&clk_gates9 3>,/*g_pclk_pmu_noc*/
@@ -537,6 +548,8 @@
                num-slots = <1>;
                fifo-depth = <0x100>;
                bus-width = <8>;
+               cru_regsbase = <0x124>;
+               cru_reset_offset = <3>;
         };
 
 
@@ -549,7 +562,7 @@
                pinctrl-names = "default", "idle", "udbg";
                pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd  &sdmmc0_dectn &sdmmc0_bus4>;
                pinctrl-1 = <&sdmmc0_gpio>;
-               pinctrl-2 = <&uart2_xfer>;
+               pinctrl-2 = <&uart2_xfer &sdmmc0_dectn>;
                clocks = <&clk_sdmmc0>, <&clk_gates5 10>;
                clock-names = "clk_mmc", "hclk_mmc";
                dmas = <&pdma 10>;
@@ -557,6 +570,8 @@
                num-slots = <1>;
                fifo-depth = <0x100>;
                bus-width = <4>;
+               cru_regsbase = <0x124>;
+               cru_reset_offset = <1>;
        };
 
        sdio: rksdmmc@10218000 {
@@ -575,6 +590,8 @@
                num-slots = <1>;
                fifo-depth = <0x100>;
                bus-width = <4>;
+               cru_regsbase = <0x124>;
+               cru_reset_offset = <2>;
        };
        
        spi0: spi@20074000 {
@@ -669,8 +686,12 @@
        dwc_control_usb: dwc-control-usb@20008000 {
                compatible = "rockchip,rk3126-dwc-control-usb";
                reg = <0x20008000 0x4>;
-               interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
-               interrupt-names = "otg_bvalid";
+               interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "otg_bvalid",
+                                 "otg0_linestate",
+                                 "otg1_linestate";
                clocks = <&clk_gates9 13>;
                clock-names = "hclk_usb_peri";
                rockchip,remote_wakeup;
@@ -711,8 +732,8 @@
                compatible = "rockchip,rk3126_ehci";
                reg = <0x101c0000 0x20000>;
                interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&clk_gates1 6>, <&clk_gates7 3>, <&clk_gates10 14>;
-               clock-names = "clk_usbphy1", "hclk_hoct0_3126","hclk_host0_3126b";
+               clocks = <&clk_gates1 6>, <&clk_gates7 3>;
+               clock-names = "clk_usbphy1", "hclk_host0";
                resets = <&reset RK3128_RST_USBOTG1>, <&reset RK3128_RST_UTMI1>,
                                <&reset RK3128_RST_OTGC1>;
                reset-names = "host_ahb", "host_phy", "host_controller";
@@ -763,6 +784,8 @@
                pinctrl-1 = <&hdmi_gpio>;
                clocks = <&clk_gates3 8>, <&pd_hdmi>;
                clock-names = "pclk_hdmi", "pd_hdmi";
+               rockchip,hdcp_enable = <0>;
+               rockchip,cec_enable = <0>;
                status = "disabled";
        };
 
@@ -799,6 +822,9 @@
                rockchip,sub = <&vpu>, <&hevc>;
                clocks = <&clk_vdpu>, <&hclk_vdpu>, <&clk_hevc_core>;
                clock-names = "aclk_vcodec", "hclk_vcodec", "clk_core";
+               resets = <&reset RK3128_RST_VCODEC_H>, <&reset RK3128_RST_VCODEC_A>,
+                       <&reset RK3128_RST_HEVC>;
+               reset-names = "video_h", "video_a", "video";
                mode_bit = <15>;
                mode_ctrl = <0x144>;
                name = "vpu_combo";
@@ -812,6 +838,7 @@
                interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&clk_gates9 8>, <&clk_gates9 7>;
                clock-names = "aclk_iep", "hclk_iep";
+               version = <1>;
                status = "okay";
        };
        
@@ -968,7 +995,7 @@
                dais {
                        dai0 {
                                audio-codec = <&codec_hdmi_spdif>;
-                               i2s-controller = <&spdif>;
+                               audio-controller = <&spdif>;
                        };
                };
        };
@@ -987,7 +1014,7 @@
                dais {
                        dai0 {
                                audio-codec = <&codec>;
-                               i2s-controller = <&i2s1>;
+                               audio-controller = <&i2s1>;
                                format = "i2s";
                                //continuous-clock;
                                //bitclock-inversion;
@@ -997,7 +1024,7 @@
                        };
                        dai1 {
                                audio-codec = <&codec>;
-                               i2s-controller = <&i2s1>;
+                               audio-controller = <&i2s1>;
                                format = "i2s";
                                //continuous-clock;
                                //bitclock-inversion;