};
};
+ psci {
+ compatible = "arm,psci";
+ method = "smc";
+ cpu_suspend = <0x84000001>;
+ cpu_off = <0x84000002>;
+ cpu_on = <0x84000003>;
+ migrate = <0x84000005>;
+ };
+
gic: interrupt-controller@10139000 {
compatible = "arm,cortex-a15-gic";
interrupt-controller;
num-slots = <1>;
fifo-depth = <0x100>;
bus-width = <8>;
+ cru_regsbase = <0x124>;
+ cru_reset_offset = <3>;
};
num-slots = <1>;
fifo-depth = <0x100>;
bus-width = <4>;
+ cru_regsbase = <0x124>;
+ cru_reset_offset = <1>;
};
sdio: rksdmmc@10218000 {
num-slots = <1>;
fifo-depth = <0x100>;
bus-width = <4>;
+ cru_regsbase = <0x124>;
+ cru_reset_offset = <2>;
};
spi0: spi@20074000 {
rockchip,sub = <&vpu>, <&hevc>;
clocks = <&clk_vdpu>, <&hclk_vdpu>, <&clk_hevc_core>;
clock-names = "aclk_vcodec", "hclk_vcodec", "clk_core";
+ resets = <&reset RK3128_RST_VCODEC_H>, <&reset RK3128_RST_VCODEC_A>,
+ <&reset RK3128_RST_HEVC>;
+ reset-names = "video_h", "video_a", "video";
mode_bit = <15>;
mode_ctrl = <0x144>;
name = "vpu_combo";
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_gates9 8>, <&clk_gates9 7>;
clock-names = "aclk_iep", "hclk_iep";
+ version = <1>;
status = "okay";
};
dais {
dai0 {
audio-codec = <&codec_hdmi_spdif>;
- i2s-controller = <&spdif>;
+ audio-controller = <&spdif>;
};
};
};
dais {
dai0 {
audio-codec = <&codec>;
- i2s-controller = <&i2s1>;
+ audio-controller = <&i2s1>;
format = "i2s";
//continuous-clock;
//bitclock-inversion;
};
dai1 {
audio-codec = <&codec>;
- i2s-controller = <&i2s1>;
+ audio-controller = <&i2s1>;
format = "i2s";
//continuous-clock;
//bitclock-inversion;