#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/clock/rk3036-cru.h>
+#include <dt-bindings/soc/rockchip,boot-mode.h>
#include "skeleton.dtsi"
/ {
};
};
+ gpu: gpu@10090000 {
+ compatible = "arm,mali400";
+
+ reg = <0x10091000 0x200>,
+ <0x10090000 0x100>,
+ <0x10093000 0x100>,
+ <0x10098000 0x1100>,
+ <0x10094000 0x100>;
+
+ reg-names = "Mali_L2",
+ "Mali_GP",
+ "Mali_GP_MMU",
+ "Mali_PP0",
+ "Mali_PP0_MMU";
+
+ interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "Mali_GP_IRQ",
+ "Mali_GP_MMU_IRQ",
+ "Mali_PP0_IRQ",
+ "Mali_PP0_MMU_IRQ";
+
+ clocks = <&cru SCLK_GPU>;
+ clock-names = "clk_mali";
+
+ status = "disabled";
+ };
+
+ vpu: video-codec@10108000 {
+ compatible = "rockchip,rk3036-vpu", "rockchip,rk3288-vpu";
+ reg = <0x10108000 0x800>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "vepu", "vdpu";
+ clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
+ clock-names = "aclk", "hclk";
+ iommus = <&vpu_mmu>;
+ /*
+ * 3036's vpu could not run higher than 300M
+ */
+ assigned-clocks = <&cru ACLK_VCODEC>;
+ assigned-clock-rates = <297000000>;
+ assigned-clock-parents = <&cru PLL_GPLL>;
+ status = "disabled";
+ };
+
+ vpu_mmu: iommu@10108800 {
+ compatible = "rockchip,iommu";
+ reg = <0x10108800 0x100>;
+ interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "vpu_mmu";
+ #iommu-cells = <0>;
+ };
+
vop: vop@10118000 {
compatible = "rockchip,rk3036-vop";
reg = <0x10118000 0x19c>;
};
grf: syscon@20008000 {
- compatible = "rockchip,rk3036-grf", "syscon";
+ compatible = "rockchip,rk3036-grf", "syscon", "simple-mfd";
reg = <0x20008000 0x1000>;
+ reboot-mode {
+ compatible = "syscon-reboot-mode";
+ offset = <0x1d8>;
+ mode-normal = <BOOT_NORMAL>;
+ mode-recovery = <BOOT_RECOVERY>;
+ mode-bootloader = <BOOT_FASTBOOT>;
+ mode-loader = <BOOT_BL_DOWNLOAD>;
+ mode-ums = <BOOT_UMS>;
+ };
};
acodec: acodec-ana@20030000 {