dtsi: sdmmc: add card_detect for udbg

[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / rk3036.dtsi

diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
index 2747643fb9cc1ac9bb6ee30ab61a100ade699f5a..36a626e9e37e7c48adc7f3f525315c6c942c344f 100755 (executable)
--- a/arch/arm/boot/dts/rk3036.dtsi
+++ b/arch/arm/boot/dts/rk3036.dtsi
@@ -17,6 +17,7 @@
                i2c0 = &i2c0;
                i2c1 = &i2c1;
                i2c2 = &i2c2;
+               lcdc = &lcdc;
                spi0 = &spi0;
        };
 
@@ -497,7 +498,7 @@
                pinctrl-names = "default", "idle", "udbg";
                pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
                pinctrl-1 = <&sdmmc0_gpio>;
-               pinctrl-2 = <&uart2_xfer>;
+               pinctrl-2 = <&uart2_xfer &sdmmc0_dectn>;
                cd-gpios = <&gpio1 GPIO_C1 GPIO_ACTIVE_HIGH>;/*CD GPIO*/
                clocks = <&clk_sdmmc0>, <&clk_gates5 10>;
                clock-names = "clk_mmc", "hclk_mmc";
@@ -637,18 +638,18 @@
                #address-cells = <1>;
                #size-cells = <0>;
 
-               ion_cma: rockchip,ion-heap@1 { /* CMA HEAP */
+               ion_cma: rockchip,ion-heap@4 { /* CMA HEAP */
                        compatible = "rockchip,ion-heap";
-                       rockchip,ion_heap = <1>;
+                       rockchip,ion_heap = <4>;
                        reg = <0x00000000 0x00000000>; /* 0MB */
                };
-               rockchip,ion-heap@3 { /* VMALLOC HEAP */
+               rockchip,ion-heap@0 { /* VMALLOC HEAP */
                        compatible = "rockchip,ion-heap";
-                       rockchip,ion_heap = <3>;
+                       rockchip,ion_heap = <0>;
                };
        };
 
-       vpu: vpu_service@10108000 {
+       /*vpu: vpu_service@10108000 {
                compatible = "vpu_service";
                iommu_enabled = <1>;
                reg = <0x10108000 0x800>;
@@ -670,6 +671,37 @@
                clock-names = "aclk_vcodec", "hclk_vcodec", "clk_core";
                name = "hevc_service";
                status = "okay";
+       };*/
+       vpu: vpu_service {
+               compatible = "rockchip,vpu_sub";
+               iommu_enabled = <1>;
+               reg = <0x10108400 0x400>;
+               interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "irq_dec";
+               dev_mode = <0>;
+               name = "vpu_service";
+       };
+
+       hevc: hevc_service {
+               compatible = "rockchip,hevc_sub";
+               iommu_enabled = <1>;
+               reg = <0x1010c000 0x400>;
+               interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "irq_dec";
+               dev_mode = <1>;
+               name = "hevc_service";
+       };
+
+       vpu_combo: vpu_combo@ff9a0000 {
+               compatible = "rockchip,vpu_combo";
+               subcnt = <2>;
+               rockchip,sub = <&vpu>, <&hevc>;
+               clocks = <&aclk_vcodec_pre>, <&clk_gates3 12>, <&clk_hevc_core>;
+               clock-names = "aclk_vcodec", "hclk_vcodec", "clk_core";
+               mode_bit = <3>;
+               mode_ctrl = <0x144>;
+               name = "vpu_combo";
+               status = "okay";
        };
 
        vop_mmu {