arm: dts: rockchip: rk3288 add android.dtsi

[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / rk3036-clocks.dtsi

diff --git a/arch/arm/boot/dts/rk3036-clocks.dtsi b/arch/arm/boot/dts/rk3036-clocks.dtsi
index 9b48f81ee543cef3f0d9c09d183fb11360a06ad1..b692f309d312b9f9d114fb5e63482fcc0a550dfb 100755 (executable)
--- a/arch/arm/boot/dts/rk3036-clocks.dtsi
+++ b/arch/arm/boot/dts/rk3036-clocks.dtsi
@@ -42,7 +42,7 @@
                        rmii_clkin: rmii_clkin {
                                compatible = "rockchip,rk-fixed-clock";
                                clock-output-names = "rmii_clkin";
-                               clock-frequency = <0>;
+                               clock-frequency = <50000000>;
                                #clock-cells = <0>;
                        };
 
@@ -85,7 +85,7 @@
 
                fixed_factor_cons {
                        compatible = "rockchip,rk-fixed-factor-cons";
-
+/*
                        otgphy0_12m: otgphy0_12m {
                                compatible = "rockchip,rk-fixed-factor-clock";
                                clocks = <&clk_gates1 5>;
@@ -94,7 +94,7 @@
                                clock-mult = <20>;
                                #clock-cells = <0>;
                        };
-
+*/
                        hclk_vcodec: hclk_vcodec {
                                compatible = "rockchip,rk-fixed-factor-clock";
                                clocks = <&aclk_vcodec_pre>;
@@ -104,6 +104,14 @@
                                #clock-cells = <0>;
                        };
 
+                       io_mac_mdclkout: io_mac_mdclkout {
+                               compatible = "rockchip,rk-fixed-factor-clock";
+                               clocks = <&aclk_peri_pre>;
+                               clock-output-names = "io_mac_mdclkout";
+                               clock-div = <2>;
+                               clock-mult = <1>;
+                               #clock-cells = <0>;
+                       };
                };
 
                clock_regs {
@@ -822,6 +830,7 @@
                                                #clock-cells = <0>;
                                                rockchip,clkops-idx =
                                                        <CLKOPS_RATE_MUX_DIV>;
+                                               rockchip,flags = <CLK_SET_RATE_NO_REPARENT>;
                                        };
 
                                        /* reg[31:7]: reserved */
@@ -857,24 +866,25 @@
                                                #clock-init-cells = <1>;
                                        };
 
-                                       clk_mac_pll_div: clk_mac_pll_div {
+                                       clk_mac_ref_div: clk_mac_ref_div {
                                                compatible = "rockchip,rk3188-div-con";
                                                rockchip,bits = <4 5>;
-                                               clocks = <&clk_mac_pll>;
-                                               clock-output-names = "clk_mac_pll";
+                                               clocks = <&clk_mac_ref>;
+                                               clock-output-names = "clk_mac";
                                                rockchip,div-type = <CLK_DIVIDER_PLUS_ONE>;
                                                #clock-cells = <0>;
-                                               rockchip,clkops-idx =
-                                                       <CLKOPS_RATE_MUX_DIV>;
+                                               #clock-init-cells = <1>;
                                        };
 
-                                       clk_mac_ref_div: clk_mac_ref_div {
+                                       clk_mac_pll_div: clk_mac_pll_div {
                                                compatible = "rockchip,rk3188-div-con";
                                                rockchip,bits = <9 5>;
-                                               clocks = <&clk_mac_ref>;
-                                               clock-output-names = "clk_mac";
+                                               clocks = <&clk_mac_pll>;
+                                               clock-output-names = "clk_mac_pll";
                                                rockchip,div-type = <CLK_DIVIDER_PLUS_ONE>;
                                                #clock-cells = <0>;
+                                               rockchip,clkops-idx =
+                                                       <CLKOPS_RATE_MUX_DIV>;
                                                #clock-init-cells = <1>;
                                        };
 
@@ -939,7 +949,7 @@
                                        clk_ddr: ddr_clk_pll_mux {
                                                compatible = "rockchip,rk3188-mux-con";
                                                rockchip,bits = <8 1>;
-                                               clocks = <&clk_gates0 2>, <&clk_gates0 8>;
+                                               clocks = <&clk_dpll>, <&dummy>;
                                                clock-output-names = "clk_ddr";
                                                #clock-cells = <0>;
                                        };
@@ -1078,6 +1088,7 @@
                                                #clock-cells = <0>;
                                                rockchip,clkops-idx =
                                                        <CLKOPS_RATE_MUX_DIV>;
+                                               rockchip,flags = <CLK_SET_RATE_NO_REPARENT>;
                                        };
 
                                        /* reg[13]: reserved */
@@ -1098,11 +1109,11 @@
                                        #address-cells = <1>;
                                        #size-cells = <1>;
 
-                                       clk_gpu_pre_div: clk_gpu_pre_div {
+                                       clk_gpu_div: clk_gpu_div {
                                                compatible = "rockchip,rk3188-div-con";
                                                rockchip,bits = <0 5>;
-                                               clocks = <&clk_gpu_pre>;
-                                               clock-output-names = "clk_gpu_pre";
+                                               clocks = <&clk_gpu>;
+                                               clock-output-names = "clk_gpu";
                                                rockchip,div-type = <CLK_DIVIDER_PLUS_ONE>;
                                                #clock-cells = <0>;
                                                rockchip,clkops-idx =
@@ -1112,11 +1123,11 @@
 
                                        /* reg[7:5]: reserved */
 
-                                       clk_gpu_pre: clk_gpu_pre_mux {
+                                       clk_gpu: clk_gpu_mux {
                                                compatible = "rockchip,rk3188-mux-con";
                                                rockchip,bits = <8 2>;
-                                               clocks = <&dummy>, <&clk_dpll>, <&clk_gpll>;
-                                               clock-output-names = "clk_gpu_pre";
+                                               clocks = <&dummy>, <&dummy>, <&clk_gpll>;
+                                               clock-output-names = "clk_gpu";
                                                #clock-cells = <0>;
                                                #clock-init-cells = <1>;
                                        };
@@ -1163,7 +1174,7 @@
 
                                                "clk_cryto",            "clk_i2s_out",
                                                "clk_i2s",              "clk_testout";
-                                       rockchip,suspend-clkgating-setting=<0x0 0x0>;
+                                       rockchip,suspend-clkgating-setting=<0x19ff 0x19ff>;
 
                                        #clock-cells = <1>;
                                };
@@ -1197,7 +1208,7 @@
                                                "clk_uart2_div",        "uart2_frac",
                                                "reserved",     "reserved";
 
-                                        rockchip,suspend-clkgating-setting=<0x0 0x0>;
+                                        rockchip,suspend-clkgating-setting=<0xc0af 0xc0af>;
                                        #clock-cells = <1>;
                                };
 
@@ -1229,7 +1240,7 @@
 
                                                "spdif_frac",           "clk_sdio",
                                                "clk_emmc",             "reserved";
-                                           rockchip,suspend-clkgating-setting=<0x0 0x0>;
+                                           rockchip,suspend-clkgating-setting=<0x81bf 0x81bf>;
 
                                        #clock-cells = <1>;
                                };
@@ -1241,28 +1252,28 @@
                                                <&dummy>,               <&dummy>,
                                                <&dclk_lcdc1>,          <&dummy>,
 
-                                               <&dummy>,                       <&dummy>,
+                                               <&dummy>,                       <&hclk_peri_pre>,
                                                <&dummy>,               <&dummy>,
 
                                                <&pclk_cpu_pre>,                <&dummy>,
                                                <&dummy>,               <&aclk_vcodec_pre>,
 
-                                               <&aclk_vcodec_pre>,             <&clk_gpu_pre>,
+                                               <&aclk_vcodec_pre>,             <&clk_gpu>,
                                                <&hclk_peri_pre>,               <&dummy>;
 
                                        clock-output-names =
                                                "reserved",             "reserved",
                                                "dclk_lcdc1",           "reserved",
 
-                                               "reserved",             "reserved",
+                                               "reserved",             "g_hclk_mac",
                                                "reserved",             "reserved",
 
                                                "g_pclk_hdmi",          "reserved",
                                                "reserved",             "aclk_vcodec_pre",
 
-                                               "hclk_vcodec",          "clk_gpu_pre",
+                                               "hclk_vcodec",          "clk_gpu",
                                                "g_hclk_sfc",           "reserved";
-                                       rockchip,suspend-clkgating-setting=<0x0000 0x0000>;
+                                               rockchip,suspend-clkgating-setting=<0xa7fb 0xa7fb>;
 
                                        #clock-cells = <1>;
                                };
@@ -1287,7 +1298,7 @@
                                                "g_hp_axi_matrix",              "g_pp_axi_matrix",
                                                "g_aclk_cpu_peri",              "g_ap_axi_matrix",
 
-                                               "reserved",             "reserved",
+                                               "reserved",             "g_hclk_mac",
                                                "reserved",             "reserved",
 
                                                "reserved",             "reserved",
@@ -1297,7 +1308,7 @@
                                                "g_aclk_intmem",                "reserved",
                                                "reserved",             "reserved";
 
-                                       rockchip,suspend-clkgating-setting = <0x0000 0x0000>;
+                                       rockchip,suspend-clkgating-setting = <0xffff 0xffff>;
                                        #clock-cells = <1>;
                                };
 
@@ -1330,7 +1341,7 @@
                                                "reserved",             "g_hclk_otg0",
                                                "g_pclk_acodec",                "reserved";
 
-                                       rockchip,suspend-clkgating-setting = <0x0000 0x0000>;
+                                       rockchip,suspend-clkgating-setting = <0x91fd 0x91fd>;
 
                                        #clock-cells = <1>;
                                };
@@ -1364,7 +1375,7 @@
                                                "g_hclk_vio_bus",               "g_aclk_vio",
                                                "reserved",             "reserved";
 
-                                       rockchip,suspend-clkgating-setting = <0x0000 0x0000>;
+                                       rockchip,suspend-clkgating-setting = <0xffff 0xffff>;
 
                                        #clock-cells = <1>;
                                };
@@ -1398,7 +1409,7 @@
                                                "g_pclk_spi",           "reserved",
                                                "reserved",             "g_pclk_wdt";
 
-                                       rockchip,suspend-clkgating-setting = <0x0000 0x0000>;
+                                       rockchip,suspend-clkgating-setting = <0x6ff2 0x6ff2>;
 
                                        #clock-cells = <1>;
                                };
@@ -1432,7 +1443,7 @@
                                                "reserved",             "reserved",
                                                "reserved",             "reserved";
 
-                                        rockchip,suspend-clkgating-setting=<0x0000 0x0000>;
+                                       rockchip,suspend-clkgating-setting=<0xf38c 0xf38c>;
                                        #clock-cells = <1>;
                                };
 
@@ -1465,7 +1476,7 @@
                                                "reserved",             "g_hclk_usb_peri",
                                                "g_hclk_pe_arbi",               "g_aclk_peri_niu";
 
-                                       rockchip,suspend-clkgating-setting=<0x0 0x0>;
+                                       rockchip,suspend-clkgating-setting=<0xdf9f 0xdf9f>;
 
                                        #clock-cells = <1>;
                                };
@@ -1499,7 +1510,7 @@
                                                "reserved",             "reserved",
                                                "reserved",             "reserved";
 
-                                       rockchip,suspend-clkgating-setting = <0x0 0x0>; /* pwm logic vol */
+                                       rockchip,suspend-clkgating-setting = <0x0077 0x0077>;   /* pwm logic vol */
 
                                        #clock-cells = <1>;
                                };